Optimization of AlGaN/GaN HEMTs for high frequency operation

Palacios, Tomás; Dora, Y.; Chakraborty, Arpan; Sanabria, C.; Keller, S.; DenBaars, Steven P.; Mishra, Umesh K.

doi:10.1002/pssa.200565384

Cited by 39 publications

(23 citation statements)

References 2 publications

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“…The large FWHM of the thick GaN buffer layer integrates both the effect of the GaN channel layer and the mosaicity induced by the grown dislocations [11,12]. The measured rocking curves of the u À 2q scans are compared for different reflections.…”

Section: Resultsmentioning

confidence: 99%

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The effect of InxGa1−xN back-barriers on the dislocation densities in Al0.31Ga0.69N/AlN/GaN/InxGa1−xN/GaN heterostructures (0.05 ≤ x ≤ 0.14)

Sarikavak‐Lisesivdin

Li̇şesi̇vdi̇n

Özbay

2013

Current Applied Physics

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x 0.14 were investigated by using XRD measurements. Screw, edge, and total dislocations, In mole fraction of back-barriers, Al mole fraction, and the thicknesses of front-barriers and lattice parameters were calculated. Mixed state dislocations with both edge and screw type dislocations were observed. The effects of the In mole fraction difference in the back-barrier and the effect of the thickness of front-barrier on crystal quality are discussed. With the increasing In mole fraction, an increasing dislocation trend is observed that may be due to the growth temperature difference between ultrathin In x Ga 1Àx N back-barrier and the surrounding layers.

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Section: Resultsmentioning

confidence: 99%

“…One of the reported device performance increments is due to the use of an ultrathin layer of In x Ga 1Àx N at GaN buffer [11,12]. With the inserting of an ultrathin In x Ga 1Àx N layer, the conduction band of the GaN buffer is raised with respect to the GaN channel in order to increase the confinement of the electrons.…”

Section: Introductionmentioning

confidence: 99%

The effect of InxGa1−xN back-barriers on the dislocation densities in Al0.31Ga0.69N/AlN/GaN/InxGa1−xN/GaN heterostructures (0.05 ≤ x ≤ 0.14)

Sarikavak‐Lisesivdin

Li̇şesi̇vdi̇n

Özbay

2013

Current Applied Physics

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“…This is mainly due to the smaller gate resistance (R g ) of the double-deck gate geometry for the plasma-exposed device compared to that of the conventional single-deck gate geometry [28]- [30]. The equation for f max is in (2) below, which clearly indicates that the main factor for governing f max is R g rather than the associated capacitances.…”

mentioning

confidence: 99%

Effect of Fluoride-based Plasma Treatment on the Performance of AlGaN/GaN MISFET

Ahn¹,

Kim²,

Kang³

et al. 2016

ETRI J

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This paper demonstrates the effect of fluoride-based plasma treatment on the performance of Al 2 O 3 /AlGaN/ GaN metal-insulator-semiconductor heterostructure field effect transistors (MISHFETs) with a T-shaped gate length of 0.20 μm. For the fabrication of the MISHFET, an Al 2 O 3 layer as a gate dielectric was deposited using atomic layer deposition, which greatly decreases the gate leakage current, followed by the deposition of the silicon nitride layer. The silicon nitride layer on the gate foot region was then selectively removed through a reactive ion etching technique using CF 4 plasma. The etching process was continued for a longer period of time even after the complete removal of the silicon nitride layer to expose the Al 2 O 3 gate dielectric layer to the plasma environment. The thickness of the Al 2 O 3 gate dielectric layer was slowly reduced during the plasma exposure. Through this plasma treatment, the device exhibited a threshold voltage shift of 3.1 V in the positive direction, an increase of 50 mS/mm in trans conductance, a degraded off-state performance and a larger gate leakage current compared with that of the reference device without a plasma treatment.

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“…One promising method for achieving higher power handling is the augmentation of channel carrier density, and this approach has been investigated extensively, primarily through the design of novel epitaxial structures [1,2] and improvement of crystalline quality. An alternative approach is to extend the forward gate bias swing, which would cause carrier accumulation in the two-dimensional electron gas (2DEG) channel and thereby achieve higher maximum drain current density.…”

mentioning

confidence: 99%

Evaluation of AlGaN/GaN‐HFET with HfAlO gate insulator

Sazawa¹,

Hirata

Kosaki

et al. 2007

Phys. Status Solidi (c)

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Metal-insulator-semiconductor (MIS) heterostructure field-effect transistors (HFETs) fabricated with HfAlO as a gate insulator with high dielectric permittivity are demonstrated to achieve true enhancementmode operation with no gate leakage and high drain current density. Insertion of the HfAlO layer allows for forward gate bias voltages of up to +8 V without gate leakage (maximum gate current density of 1.2×10-5 mA/mm at +8 V gate bias) under direct current operation. Utilizing the extended forward gate bias swing, a maximum drain current density of 767 mA/mm is achieved, substantially higher than that of the non-insulated HFET (427 mA/mm). A recessed-gate MIS-HFET with the HfAlO gate insulator exhibits a threshold voltage of +2.0 V and zero transconductance below a gate bias of +0.9 V, demonstrating true enhancement-mode operation for the first time in recessed-gate AlGaN/GaN-HFETs with a maximum drain current density of 253 mA/mm at +5 V. 1 Introduction High power handling is a distinguishing feature of AlGaN/GaN heterostructure fieldeffect transistors (HFETs), and many attempts have been made to enhance this characteristic. One promising method for achieving higher power handling is the augmentation of channel carrier density, and this approach has been investigated extensively, primarily through the design of novel epitaxial structures [1, 2] and improvement of crystalline quality. An alternative approach is to extend the forward gate bias swing, which would cause carrier accumulation in the two-dimensional electron gas (2DEG) channel and thereby achieve higher maximum drain current density. Such an approach is also a key factor in realizing enhancement-mode (E-mode) operation [3][4][5], which is strongly desired for the purposes of simplifying circuit design through the use of a single-polarity voltage supply, and for reducing power consumption by facilitating complimentary logic circuit design.To achieve greater forward bias swing, gate leakage should be maintained at a low level throughout the range of gate bias control, particularly in the region of forward gate bias. Although a gate insulator is useful for this purpose, the insertion of a gate insulator not only prevents gate leakage but also reduces the electric field over the 2DEG channel, resulting in poor channel modulation. To achieve both low gate leakage and effective channel modulation, a gate insulator with high dielectric permittivity (high-k) and large band offset to both the gate metal and the AlGaN layer is desired.Many high-k materials have been examined to date as a gate insulator, in single or laminated configuration achieved by various formation techniques [6][7][8]. However, previous insulators are imperfect in terms of compatibility in current blocking performance and gate bias translation capability.

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Optimization of AlGaN/GaN HEMTs for high frequency operation

Cited by 39 publications

References 2 publications

The effect of InxGa1−xN back-barriers on the dislocation densities in Al0.31Ga0.69N/AlN/GaN/InxGa1−xN/GaN heterostructures (0.05 ≤ x ≤ 0.14)

The effect of InxGa1−xN back-barriers on the dislocation densities in Al0.31Ga0.69N/AlN/GaN/InxGa1−xN/GaN heterostructures (0.05 ≤ x ≤ 0.14)

Effect of Fluoride-based Plasma Treatment on the Performance of AlGaN/GaN MISFET

Evaluation of AlGaN/GaN‐HFET with HfAlO gate insulator

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