Optimization of QC-LDPC Codes by Edge Exchange Method Based on ACE

Qin, Xin; Yang, Chuanchuan; Zheng, Ziyuan; Wang, Ziyu

doi:10.1109/lpt.2019.2927029

Cited by 4 publications

(2 citation statements)

References 10 publications

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“…In fact, there exist many cycles in an LDPC code with finite length. Hence, in order to avoid short cycles or obtain LDPC codes with large girth, many construction methods and techniques are proposed [25][26][27][28][29][30][31][32][33].…”

Section: : ð3þmentioning

confidence: 99%

“…Based on the prime field GF (31), we can construct an 8 × 16 array HðP 8×16,1 Þ of 31 × 31 CPMs in the form of (13) by choosing the 8 rows and 16 columns from the exponent matrix P in equation(12). The indices of the chosen 8 rows and 16 columns from P are {3, 4, 5, 10, 15, 17, 24, 28} and {1,4,5,6,7,8,9,10,11,15,16,19,26,28,29, 30}, respectively. The row and column selection method is based on the proposed method in…”

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confidence: 99%

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Design of Nonbinary LDPC Cycle Codes with Large Girth from Circulants and Finite Fields

Gao

et al. 2021

Wireless Communications and Mobile Computing

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In this paper, we study a class of nonbinary LDPC (NBLDPC) codes whose parity-check matrices have column weight 2, called NBLDPC cycle codes. We propose a design framework of 2 , ρ -regular binary quasi-cyclic (QC) LDPC codes and then construct NBLDPC cycle codes of large girth based on circulants and finite fields by randomly choosing the nonzero field elements in their parity-check matrices. For enlarging the girth values, our approach is twofold. First, we give an exhaustive search of circulants with column/row weight ρ and design a masking matrix with good cycle distribution based on the edge-node relation in undirected graphs. Second, according to the designed masking matrix, we construct the exponent matrix based on finite fields. The iterative decoding performances of the constructed codes on the additive white Gaussian noise (AWGN) channel are finally provided.

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Section: : ð3þmentioning

confidence: 99%

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confidence: 99%

Design of Nonbinary LDPC Cycle Codes with Large Girth from Circulants and Finite Fields

Gao

et al. 2021

Wireless Communications and Mobile Computing

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Genetic Optimization of LDPC Codes to Improve the Correction of Burst Errors

2020

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Error correction plays a crucial role when transmitting data from the source to the destination through a noisy channel. It has found many applications in television broadcasting services, data transmission in radiation harsh environment (e. g. space probes or physical experiments) or memory storages influenced by Single Event Effects (SEE). Low Density Parity Check (LDPC) codes provide an important technique to correct these errors. The parameters of error correction depend both on the decoding algorithm and on the LDPC code given by the parity-check matrix. Therefore, a particular design of the paritycheck matrix is necessary. Moreover, with the development of high performance computing, the application of genetic optimization algorithms to design the parity-check matrices has been enabled. In this article, we present the application of the genetic optimization algorithm to produce error correcting codes with special properties, especially the burst types of errors. The results show the bounds of correction capabilities for various code lengths and various redundancies of LDPC codes. This is particularly useful when designing systems under the influence of noise combined with the application of the error correction codes.

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A Novel LDPC Construction Scheme for NAND Flash Memory

Jiang

et al. 2022

2022 5th International Conference on Circuits, Systems and Simulation (ICCSS)

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Optimization of QC-LDPC Codes by Edge Exchange Method Based on ACE

Cited by 4 publications

References 10 publications

Design of Nonbinary LDPC Cycle Codes with Large Girth from Circulants and Finite Fields

Design of Nonbinary LDPC Cycle Codes with Large Girth from Circulants and Finite Fields

Genetic Optimization of LDPC Codes to Improve the Correction of Burst Errors

A Novel LDPC Construction Scheme for NAND Flash Memory

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