Optimization of silicon-germanium TFT's through the control of amorphous precursor characteristics

Abstract

Polycrystalline thin-film transistors (TFT's) are promising for use as high-performance pixel and integrated driver transistors for active matrix liquid crystal displays (AMLCD's). Silicon-germanium is a promising candidate for use as the channel material due to its low thermal budget requirements. The binary nature of the silicon-germanium system complicates the optimization of the channel deposition conditions. To date, little work has been done to perform this optimization, resulting in poor performance for SiGe TFT's. We report on optimization studies done on the low-pressure chemical vapor deposition of SiGe and its effect on TFT performance. We detail the results of a response surface characterization of SiGe deposition, and explain the obtained results in terms of atomistic models of deposition. Optimization strategies to enable the fabrication of high-performance SiGe TFT's are explained. Using these strategies, SiGe TFT's fabricated using solid phase crystallization and a 550 C process are demonstrated, with mobility greater than 40 cm 2 /V-s. Analysis is also performed on the effect of Ge-catalysis on the maximum optimization range. Results suggest that SiGe may offer enhanced optimization ranges over Si, as a result of this catalysis.

High-performance polycrystalline SiGe thin-film transistors using Al2O3 gate insulators

“…A relative dielectric constant of ten was assumed for Al O . This mobility is much better than that of the hydrogenated poly-SiGe TFT's using SiO as the gate insulators [3]- [5].…”

“…In all of these applications, the processing of SiGe is believed to be "compatible" to the processing of Si. However, because of the poor interface between a conventional SiO gate insulator and the polycrystalline SiGe (poly-SiGe) channel layer, there is still significant disparity, particularly for NMOS thin-film transistors (TFT's), between the best reported performance of poly-SiGe and that of poly-Si TFT's, even after extensive optimization [4], [5]. Clearly, improving the quality of the interface, rather than that of the channel layer, holds the key to realizing better performing poly-SiGe TFT's.…”

PECVD growth of Six:Ge1−x films for high speed devices and MEMS

“…Also thermal conductivity of SiGe layers is low making them ideal for MEMS applications. SiGe offers a platform for post-processing of MEMS structures on top of prefabricated driving electronics (CMOS), besides being a promising candidate for polycrystalline thin film transistors (TFTs) used in liquid crystal displays, due to the ability to engineer the bandgap [2].…”

Study of low dimensional SiGe island on Si for potential visible Metal-Semiconductor-Metal photodetector

“…The next step of the simulation is setting up the material and physical model in the input file. In Silvaco TCAD tools, there are wide number of physical model such as models for recombination, photogeneration, mobility and lifetime [14]. The project used AUGER recombination model for the physical model as shown in Table 4.…”