Optimization of Specific On-Resistance of Balanced Symmetric Superjunction MOSFETs Based on a Better Approximation of Ionization Integral

Abstract

A breakdown voltage model based on the 2-D analytical model of the electric field distributions for the balanced and symmetric superjunction (SJ) MOSFET is presented and used to explain the different breakdown mechanisms as a function of column doping concentrations and widths. It is observed that breakdowns simultaneously occur along different electric field lines across some special symmetric points when the drift region is not fully depleted. Moreover, the minimum specific onresistance can be obtained when the ionization integrals along these electric field lines are both in unity. For a breakdown voltage larger than 600 V, the minimum specific on-resistance R on of the SJ structure can be reduced by larger than 13% compared with the "suboptimum" case in the previous literature. Comparisons of results from the proposed model and simulation data show that the approximation solution exhibits excellent accuracy. The dependence values of the breakdown voltages on charge imbalance and the transient characteristics are also discussed.

Optimized process design flow for fabrication of superjunction VDMOS for enhanced R<inf>DSon</inf>A

“…1 shows a simplified 2D cross sectional view of the SJ VDMOS cell. The accuracy of the 2D device simulation result has been confirmed by numerical simulation using various structural geometrical parameter combinations [7], [8]. The influence of CB is also incorporated into this structure with very good accuracy [9] .…”

Novel strained superjunction VDMOS

“…The cross section view of the proposed s-SJ drift layer, conventional SJ drift layer [3], proposed s-SJ VDMOS and conventional SJ VDMOS are shown in Fig. 1(a-d).…”

“…Conventional siliconlimit (Si-limit) has been optimized by SJ devices [2,3]. Due to this, trade-offs between the breakdown voltage (BV) and area specific on-resistance (R on A) are improved in power devices.…”

“…Due to this, trade-offs between the breakdown voltage (BV) and area specific on-resistance (R on A) are improved in power devices. Nevertheless, many articles have reported various techniques for improvement of SJ devices in terms of enhancement of BV, optimization in R on A, reduce charge termination (CT), perfect charge-balance (CB) [2,3,4,5,6,7,8,9]. Further, the separate high-K (HK) dielectric pillar in power devices was introduced to avoid impurity inter-diffusion, reduce R on A and improve BV [10,11].…”

Electrical characteristics comparison between process and device structures of super junction VDMOS

“…The literature discussion is on deep trench p-pillar for forming SJ VDMOSFET [6,7]. SJ VDMOS aspect ratio, epitaxial layer (tepi)/cell pitch (Cp) is proportional to BV [8,9].The super junction VDMOS and its super junction drift layer is shown in Fig. 1 [10].…”