Optimization of the Mealy Automaton Circuit in the FPGA Basis

Abstract

Introduction. The ubiquitous penetration of digital systems into all spheres of human activity has made obvious the desire to reduce hardware costs. If for the implementation of combinational circuits there are standard solutions used in various CAD systems, then for many types of accumulating blocks, which include control devices (CU), there are no standard library solutions. CU circuits, which are a sequential circuit, must be designed first each time because, as a rule, these circuits differ in an irregular structure and a complex interconnection system. The characteristics of the control device have a significant impact on the quality of the digital system, and therefore the issue of designing a control device is a responsible process that, as a rule, requires solving the problem of reducing hardware costs. Methods for solving this problem depend on the features of both the architecture of the control device and the elemental basis. Purpose. The main goal of this work is to reduce hardware costs and power consumption of control devices of digital systems by taking into account features of an element base of the control device and rational organization of micro-command addressing. FPGA (field-programmable logic array) microcircuits, widely used for the implementation of modern digital systems, were chosen as an elementary basis. Methods. To evaluate the effectiveness of solving the problem, we used the methods of set theory, synthesis of automata, and software simulation using Xilinx Vivado CAD. Results. The paper proposes a method for reducing hardware costs in the microprogram Mealy automaton (MPA) scheme implemented on an EMB and LUT basis. The method is based on the use of EMB to implement the logical condition replacement block. It is proposed to implement a part of the output signals (micro-operations) on EMB. The applicability conditions for this approach are shown. An example of the synthesis of MPA using the proposed method is given. All stages of the synthesis are analyzed in detail. Some alternative solutions are proposed and the conditions for their use are shown. Conclusion. Studies have shown that when using one EMB block, our method gives a gain in the number of LUT elements. Comparisons were made with schemes obtained using the Auto, One-hot, and Sequential methods of the Vivado system.

Structural Decomposition in FSM Design: Roots, Evolution, Current State—A Review

“…For example, MPY FSMs could be implemented using MXs, PLAs, and PROMs (Figure 15). Different approaches were used for optimizing characteristics of PLA-based FSMs [76][77][78][79][80][81][82]. One of the new approaches was an encoding of FSM terms [78], leading to PH FSMs.…”