Optimization of the NMOS and PMOS gate cross-connected rectifier for RF power extraction in RFID applications

Fu, Qiuyun; Bansleben, Christian; Hildebrand, Roger; Heiss, Michael; Türke, Alexander; Fischer, Wolf‐Joachim

doi:10.1109/apmc.2008.4958341

Cited by 6 publications

(2 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In Figure 4a, the NMOS and PMOS gate cross rectifier eliminates the threshold voltage drop [15][16][17]. However, because the substrate voltage V b of the PMOS is always connected to the output voltage V out , sometimes it is lower than the input voltage V in+ , as shown in Figure 4b.…”

Section: Substrate-adaptive Rectifiermentioning

confidence: 99%

A 62 ppm MDR Deviation and Sub-250 ns MTIE Railway Balise

Li,

Shan,

Wei

et al. 2023

Electronics

View full text Add to dashboard Cite

A balise is a specialized device utilized for train communication and control. However, existing balises are composed of separate components, resulting in high production costs, low integration, and significant room for improvement in stability. We propose an integrated solution, to enhance the integration of balises, reducing the number of discrete components. Additionally, we propose a feedback-enabled energy extraction circuit with a limiter-based startup circuit, to enhance the stability of the balise system. The prototype was fabricated using 180 nm high voltage(HV) complementary metal oxide semiconductor(CMOS) technology. Once implemented in the balise, the number of discrete components in the system is reduced by 25%, and the system can start up within 20 ms and operate stably. The mean data rate (MDR) deviation of the balise is only 62 ppm, which is 69% lower than that specified in the test specification for the Eurobalise form–fit–function interface specification (FFFIS), and the maximum time interval error (MTIE) is less than 250 ns.

show abstract

Section: Substrate-adaptive Rectifiermentioning

confidence: 99%

A 62 ppm MDR Deviation and Sub-250 ns MTIE Railway Balise

Li,

Shan,

Wei

et al. 2023

Electronics

View full text Add to dashboard Cite

show abstract

“…Thus, the minimum operation input level is efficiently reduced in this design. According to the preceding analysis, the antenna voltage is similar to a sinusoidal signal, and the output voltage level is [ 18 ]:

where V REC0 is the output voltage of the rectifier, V ANT is the peak amplitude of the antennas voltage, V TH is the threshold voltage of NMOS. As V SB = V REC0 , V SB is the source-bulk voltage of MN1 and MN2, according to the bulk effect model of NMOS, there is:

where V TH0 is the intrinsic threshold voltage, γ is the body effect coefficient, ϕ F is the Fermi potential.…”

Section: Design and Implementation Of Rf Powering Circuitmentioning

confidence: 99%

Design and Implementation of a RF Powering Circuit for RFID Tags or Other Batteryless Embedded Devices

Wang

Yao

et al. 2014

Sensors

View full text Add to dashboard Cite

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm2. The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips.

show abstract