Optimization of the PLL based TRNG design using the genetic algorithm

Petura, Oto; Mureddu, Ugo; Bochard, Nathalie; Fischer, Viktor

doi:10.1109/iscas.2017.8050839

Cited by 4 publications

(2 citation statements)

References 5 publications

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“…In [8], Petura et al question this "expert input" approach and derive the parameters of the PLL-TRNG using a genetic algorithm. They indeed find better configurations than previously known, having better throughput and entropy.…”

Section: Related Workmentioning

confidence: 99%

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator

Colombier

Bochard

Bernard

et al. 2020

2020 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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The phase-locked loop-based true random number generator (PLL-TRNG) extracts randomness from clock jitter. It is an interesting construct because it comes with a stochastic model, making it certifiable by certification bodies. However, bringing it to good performance is difficult since it comes with multiple parameters to tune. This article proposes to use backtracking to determine these parameters. Compared to existing methods, based on genetic algorithms or exhaustive search of a feasible set of parameters, backtracking has several advantages. Indeed, since this method is expressible by constraint programming, it provides very good readability. Constraints can be specified in a very straightforward and maintainable way. It also exhibits good performance and generates PLL-TRNG configurations rapidly. Finally, it allows to integrate new exploratory design constraints for the PLL-TRNG very easily. We provide experimental results with a PLL-TRNG implemented on three FPGA families that come with different physical constraints, showing that the method allows to find good parameters for every one of them. Moreover, we were able to obtain configurations that lead to an increase 59 % in throughput and 82 % in jitter sensitivity on average, thereby generating random numbers of higher quality at a faster rate. This approach also paves the way for new design exploration strategies for PLL-TRNG. The source code of our implementation is open source and available online for reproducibility and reuse.

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Section: Related Workmentioning

confidence: 99%

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator

Colombier

Bochard

Bernard

et al. 2020

2020 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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“…The same team then optimized the design of the generator using a genetic algorithm (GA) [8]. The authors claimed that they significantly reduced the design time and enhanced both entropy rate and bit rate at generator output.…”

Section: Introductionmentioning

confidence: 99%

Optimization of the PLL configuration in a PLL-based TRNG design

Allini

Petura

Fischer

et al. 2018

2018 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Abstract-Several recent designs show that the phase lockedloops (PLLs) are well suited for building true random number generators (TRNG) in logic devices and especially in FPGAs, in which PLLs are physically isolated from the rest of the device. However, the setup of the PLL configuration for the PLL-based TRNG is a challenging task. Indeed, the designer has to take into account physical constraints of the hardwired block, when trying to achieve required performance (bit rate) and security (entropy rate per bit). In this paper, we introduce a method aimed at choosing PLL parameters (e.g. input frequency, multiplication and division factors of the PLL) that satisfy hardware constraints, while achieving the highest possible bit rate or entropy rate according to application requirements. The proposed method is fast enough to produce all possible configurations in a short time.Comparing to the previous method based on a genetic algorithm, which was able to find only a locally optimized solution and only for one PLL in tens of seconds, the new method finds exhaustive set of feasible configurations of one-or two-PLL TRNG in few seconds, while the found configurations can be ordered depending on their performance or sensitivity to jitter.

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Design and Implementation of a Fast, Platform-Adaptive, AIS-20/31 Compliant PLL-Based True Random Number Generator on a Zynq 7020 SoC FPGA

Yayla,

Yılmaz

2024

Lecture Notes in Networks and Systems

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Optimization of the PLL based TRNG design using the genetic algorithm

Cited by 4 publications

References 5 publications

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator

Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator

Optimization of the PLL configuration in a PLL-based TRNG design

Design and Implementation of a Fast, Platform-Adaptive, AIS-20/31 Compliant PLL-Based True Random Number Generator on a Zynq 7020 SoC FPGA

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