Optimizations for configuring and mapping software pipelines in many core systems

Jahn, Janmartin; Pagani, Santiago; Kobbe, Sebastian; Chen, Jian-Jia; Henkel, Jörg

doi:10.1145/2463209.2488894

Cited by 15 publications

(13 citation statements)

References 23 publications

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“…Jahn et al [28] analyze the performance of softwarepipelined applications with running on many-core systems. The study addresses a challenging scenario in which the applications show unpredictable and significant variances in the demand of hardware resources.…”

Section: Related Workmentioning

confidence: 99%

Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach

Radojković

Carpenter

Moretó

et al. 2016

IEEE Trans. Comput.

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Abstract-The introduction of multicore/multithreaded processors, comprised of a large number of hardware contexts (virtual CPUs) that share resources at multiple levels, has made process scheduling, in particular assignment of running threads to available hardware contexts, an important aspect of system performance. Nevertheless, thread assignment of applications running on state-of-the art processors is an NP-complete problem. Over the years, numerous studies have proposed heuristic-based algorithms for thread assignment. Since the thread assignment problem is intractable, it is in general impossible to know the performance of the optimal assignment, so the room for improvement of a given algorithm is also unknown. It is therefore hard to decide whether to invest more effort and time to improve an algorithm that may already be close to optimal. In this paper, we present a statistical approach to the thread assignment problem. First, we present a method that predicts the performance of the optimal thread assignment, based on the observed performance of each thread assignment in a random sample. The method is based on Extreme Value Theory (EVT), a branch of statistics that analyses extreme deviations from the population mean. We also propose sample pruning, a method that significantly reduces the time required to apply the statistical method by reducing the number of candidate solutions that need to be measured. Finally, we show that, if no suitable heuristicbased algorithm is available, a sample of several thousand random thread assignments is enough to obtain, with high confidence, an assignment with performance close to optimal. The presented approach is architecture and application independent, and it can be used to address the thread assignment problem in various domains. It is especially well suited for systems in which the workload seldom changes. An example is network systems, which typically provide a constant set of services that are known in advance, with network applications performing a similar processing algorithm for each packet in the system. In this paper, we validate our methods with an industrial case study for a set of multithreaded network applications on an UltraSPARC T2 processor. This article is an extension of our previous work [44], which was published in

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Section: Related Workmentioning

confidence: 99%

Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach

Radojković

Carpenter

Moretó

et al. 2016

IEEE Trans. Comput.

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“…To solve this problem, we introduce a dynamic programming algorithm derived from an algorithm proposed in a previous work [15], after adapting and extending it to consider power budget constraint and different v/f levels, in order to meet our problem and requirements. Dynamic programming breaks down the problem into small sub-problems, and builds up the final solution gradually.…”

Section: Tdp-constrained Optimal Resource Distributionmentioning

confidence: 99%

Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips

Khdr

Pagani

Shafique

et al. 2015

Proceedings of the 52nd Annual Design Automation Conference

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In dark silicon chips, a significant amount of on-chip resources cannot be simultaneously powered on and need to stay dark, i.e., power gated, in order to avoid thermal emergencies. This paper presents a resource management technique, called DsRem, that selects the number of active cores jointly with their voltage/frequency (v/f) levels, considering the high Instruction Level Parallelism (ILP) or Thread Level Parallelism (TLP) nature of different applications, in order to maximize the overall system performance. DsRem leverages the positioning of dark cores, to efficiently dissipate the heat generated by the active cores. This facilitates increasing the v/f level of the active cores, which leads to further performance improvement. Compared to stateof-the-art thermal-aware task application mapping, DsRem achieves up to 46% performance gain, while avoiding any thermal emergencies. Additionally, DsRem outperforms the boosting technique with 26%.

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“…However, such heuristic-based approach lacks the global information of the application and thus, the result is likely to converge to a locally sub-optimal solution. Some of the decentralized resource allocation methods for many-core systems [20] follow multiagent models [21] or game theory [9,22] in decision making.…”

Section: Related Workmentioning

confidence: 99%