Optimized LDMOS Offering for Power Management and RF Applications

Cimino, S.; Singh, J.; Johnson, J.; Zheng, Wenhan; Chen, Y.; Liu, W.; Srinivasan, P.; Gonzales, O.; Hauser, M.; Koskinen, Matthew; Nagahiro, K.; Liu, Y.; Min, B.; Nigam, T.; Squib, N.

doi:10.1109/irps48227.2022.9764528

Cited by 1 publication

(1 citation statement)

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“…[2] To achieve all power device characteristics, such as high BV, high transconductance, and high switching speed at once, [4] is difficult because every improvement to one performance parameter affects the other. [5][6][7][8][9] Between gate oxide layer reliability and specific resistance, there is a trade-off. On the other hand, the BV remains unchanged when the resistance is reduced.…”

Section: Introductionmentioning

confidence: 99%

Dual‐Stepped Gate Vertical Double‐Diffused Metal‐Oxide‐Semiconductor Field‐Effect Transistor with Enhanced Device Performance

Sidar,

Parmar,

Mishra

2024

Physica Status Solidi (a)

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In this paper, Vertical Double Diffused MOSFET(VDMOS) with improved device structure is proposed. Gate engineering is applied in the proposed device and two devices namely dual stepped gate technology(DSGT) and modified dual stepped gate technology(m‐DSGT) are proposed here. Due to the effect of gate engineering switching ability is improved and area specific ON‐resistance is reduced. Devices are simulated using Silvaco Atlas software. Breakdown voltages for conventional and m‐DSGT are 278.63V and 280.02V, respectively, for VGS=0V. The current density of conventional and m‐DSGT devices is 49.2A/cm2 and 178.5A/cm2 under the conditions on gate drive voltage of 1V for VDS=10V. Using 2‐D numerical simulations, the electrical performance of both DSGT and m‐DSGT devices is examined. The results demonstrate 76.6% decrease in specific ON‐resistance, 4.22 times increase in current density and 26.67% faster switching speed compared to conventional VDMOS. Thus, improving the device performance.This article is protected by copyright. All rights reserved.

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