Optimizing for KNL Usage Modes When Data Doesn't Fit in MCDRAM

Butcher, Neil; Olivier, Stephen Lecler; Berry, Jonathan W.; Hammond, Simon David; Kogge, Peter M.

doi:10.1145/3225058.3225116

Cited by 6 publications

(5 citation statements)

References 20 publications

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“…In conclusion, as previously stated in several papers like [5], we show that allocating all data in MCDRAM memory might not be the most relevant choice. Indeed, when data do not fit inside this high bandwidth memory bank, application performance is deteriorated, even more than without the use of MCDRAM.…”

Section: Fine-grain Openmp Memory Allocationsupporting

confidence: 62%

“…relying on the numactl library [8] or forcing the global memory-placement policy [19]), or a more fine-grain approach (e.g. using memory allocators like memkind [6] to deal with placement on a per-allocation basis [5]). Similar fine-grain initiatives also exist for other types of memory e.g., persistent [16,2,25].…”

Section: Related Workmentioning

confidence: 99%

“…For example, data allocation in high bandwidth or in large capacity memory spaces are currently well supported within the memkind library. 5 The MPC framework comes with its own NUMA-aware allocator [28] based on kernel page reuse. For more convenience, and to avoid multiple library integrations, we link our allocator to the OpenMP runtime.…”

Section: Runtime System Design For Memory Management Integrationmentioning

confidence: 99%

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Preliminary Experience with OpenMP Memory Management Implementation

Roussel

Carribault

Jaeger

2020

OpenMP: Portable Multi-Level Parallelism on Modern Systems

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Because of the evolution of compute units, memory heterogeneity is becoming popular in HPC systems. But dealing with such various memory levels often requires different approaches and interfaces. For this purpose, OpenMP 5.0 defines memory-management constructs to offer application developers the ability to tackle the issue of exploiting multiple memory spaces in a portable way. This paper proposes an overview of memory-management from applications to runtimes. Thus, we describe a convenient way to tune an application to include memory management constructs. We also detail a methodology to integrate them into an OpenMP runtime supporting multiple memory types (DDR, MC-DRAM and NVDIMM). We implement our design into the MPC framework, while presenting some results on a realistic benchmark.

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Section: Fine-grain Openmp Memory Allocationsupporting

confidence: 62%

Section: Related Workmentioning

confidence: 99%

Section: Runtime System Design For Memory Management Integrationmentioning

confidence: 99%

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Preliminary Experience with OpenMP Memory Management Implementation

Roussel

Carribault

Jaeger

2020

OpenMP: Portable Multi-Level Parallelism on Modern Systems

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“…Some runtime-based approaches target different programming model, such as task parallel programming [1,37], which is out of our scope. Other studies focus on application specific solutions [6,27], but ours aims at covering general applications. OS/HW-level page managements have been widely studied for hybrid memory systems, but they require hardware modifications [11,38].…”

Section: Related Workmentioning

confidence: 99%

“…In this technique, the data is divided into chunks of a few GB, and the staged access is, in turn, applied to each of them. Several recent studies also focus on the data managements for hybrid memory systems [3,6,11,21,27,36,38], but none of them exploits this large performance impact of the access pattern to improve software-based data placement decisions at runtime.…”

Section: Introductionmentioning

confidence: 99%

Pattern-Aware Staging for Hybrid Memory Systems

Arima

Schulz

2020

Lecture Notes in Computer Science

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The ever increasing demand for higher memory performance and-at the same time-larger memory capacity is leading the industry towards hybrid main memory designs, i.e., memory systems that consist of multiple different memory technologies. This trend, however, naturally leads to one important question: how can we efficiently utilize such hybrid memories? Our paper proposes a software-based approach to solve this challenge by deploying a pattern-aware staging technique. Our work is based on the following observations: (a) the high-bandwidth fast memory outperforms the large memory for memory intensive tasks; (b) but those tasks can run for much longer than a bulk data copy to/from the fast memory, especially when the access pattern is more irregular/sparse. We exploit these observations by applying the following staging technique if the accesses are irregular and sparse: (1) copying a chunk (few GB of sequential data) from large to fast memory; (2) performing a memory intensive task on the chunk; and (3) writing it back to the large memory. To check the regularity/sparseness of the accesses at runtime with negligible performance impact, we develop a lightweight pattern detection mechanism using a helper threading inspired approach with two different Bloom filters. Our case study using various scientific codes on a real system shows that our approach achieves significant speed-ups compared to executions with using only the large memory or hardware caching: 3× or 41% speedups in the best, respectively.

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