Optimizing Logical Execution Time Model for Both Determinism and Low Latency

Wang, Sen; Li, Dong; Sifat, Ashrarul H.; Huang, Shao-Yu; Deng, Xuanliang; Jung, Changhee; Williams, Ryan; Zeng, Haibo

doi:10.1109/rtas61025.2024.00019

2024 IEEE 30th Real-Time and Embedded Technology and Applications Symposium (RTAS) 2024

DOI: 10.1109/rtas61025.2024.00019

|View full text |Cite

Optimizing Logical Execution Time Model for Both Determinism and Low Latency

Sen Wang,

Dong Li,

Ashrarul H. Sifat

et al.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2024

Publication Types

Select...

Article2

Relationship

Self Cite0

Independent2

Authors

Journals

Cited by 2 publications

References 33 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

Time-Triggered Scheduling for Nonpreemptive Real-Time DAG Tasks Using 1-Opt Local Search

Wang,

Li,

Huang

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Time-Triggered Scheduling for Nonpreemptive Real-Time DAG Tasks Using 1-Opt Local Search

Wang,

Li,

Huang

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Logical Execution Time and Time-Division Multiple Access in Multicore Embedded Systems: A Case Study

Mosqueda-Arvizu,

Romero-González,

Córdova-Esparza

et al. 2024

Algorithms

View full text Add to dashboard Cite

The automotive industry has recently adopted multicore processors and microcontrollers to meet the requirements of new features, such as autonomous driving, and comply with the latest safety standards. However, inter-core communication poses a challenge in ensuring real-time requirements such as time determinism and low latencies. Concurrent access to shared buffers makes predicting the flow of data difficult, leading to decreased algorithm performance. This study explores the integration of Logical Execution Time (LET) and Time-Division Multiple Access (TDMA) models in multicore embedded systems to address the challenges in inter-core communication by synchronizing read/write operations across different cores, significantly reducing latency variability and improving system predictability and consistency. Experimental results demonstrate that this integrated approach eliminates data loss and maintains fixed operation rates, achieving a consistent latency of 11 ms. The LET-TDMA method reduces latency variability to approximately 1 ms, maintaining a maximum delay of 1.002 ms and a minimum delay of 1.001 ms, compared to the variability in the LET-only method, which ranged from 3.2846 ms to 8.9257 ms for different configurations.

show abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

Optimizing Logical Execution Time Model for Both Determinism and Low Latency

Cited by 2 publications

References 33 publications

Time-Triggered Scheduling for Nonpreemptive Real-Time DAG Tasks Using 1-Opt Local Search

Time-Triggered Scheduling for Nonpreemptive Real-Time DAG Tasks Using 1-Opt Local Search

Logical Execution Time and Time-Division Multiple Access in Multicore Embedded Systems: A Case Study

Contact Info

Product

Resources

About