Optimizing Memory Access Performance Using Hardware Assisted Virtualization in Retargetable Dynamic Binary Translation

Faravelon, Antoine; Gruber, Olivier; Pétrot, Frédéric

doi:10.1109/dsd.2017.41

Cited by 4 publications

(6 citation statements)

References 11 publications

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“…Some research studies have been conducted to address these issues. There are many optimization methods for dynamic binary translation, such as hot path optimization [18], register mapping optimization [19,20], multi-threaded parallel optimization [17], and memory access optimization [21]. Díaz et al proposed a joint hardware/software simulation virtual platform scheme to address the difficulty of system verification for heterogeneous and homogeneous architectures and implemented a parallelized QEMU prototype [22].…”

Section: Overviewmentioning

confidence: 99%

A Dynamic and Static Binary Translation Method Based on Branch Prediction

Sun,

Wu,

et al. 2023

Electronics

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Binary translation is an important technique for achieving cross-architecture software migration. However, mainstream dynamic binary translation frameworks, such as QEMU, often generate a large amount of redundant code, which degrades the efficiency of the target code. To this end, we propose a dynamic–static binary translation method based on branch prediction. It first identifies parts of translation blocks following static branch prediction techniques. Then it translates these translation blocks into less-redundant native code blocks by canonical static translation algorithms. Finally, it executes all code blocks that are translated either statically or dynamically by correctly maintaining and switching their running contexts. In order to correctly weave the two types of translation activities, the proposed method only translates the next translation block that is data-independent from the current one by the active variable analysis algorithm, and records and shares the intermediate states of the dynamic and static translation activities via a carefully designed data structure. In particular, a shadow register-based context recovery mechanism is proposed to correctly record the running context of static translation blocks, and to correctly recover the context for dynamically translating and running blocks that were not statically translated. We also designed an adaptive memory optimization mechanism to dynamically release the memory of the mispredicted translation blocks. We implemented a dynamic–static binary translation framework by extending QEMU, called BP-QEMU (QEMU with branch prediction). We evaluated the translation correctness of BP-QEMU using the testing programs for the ARM and PPC instruction sets from QEMU, and evaluated the performance of BP-QEMU using the CoreMark benchmark code. The experimental results show that BP-QEMU can translate the instructions from the ARM and PPC architectures correctly; moreover, the average execution efficiency of the CoreMark code on BP-QEMU improves by 13.3% compared to that of QEMU.

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Section: Overviewmentioning

confidence: 99%

A Dynamic and Static Binary Translation Method Based on Branch Prediction

Sun,

Wu,

et al. 2023

Electronics

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“…But it used mmap syscall instead of a kernel module to set up direct address mapping and thus more portable. Spink et al [16,17] and Faravelon et al [10] take advantage of the host's hardware memory virtualization resources to achieve high-performance cross-ISA memory virtualization from a bare-metal perspective. However, all these works requires that the host system has a larger virtual address space than the guest.…”

Section: Related Workmentioning

confidence: 99%

“…HSPT [23] followed the same idea, but it used the mmap system call to avoid kernel module dependency. Faravelon et al [10] also implemented a similar scheme. However, all these works share some limitations.…”

Section: Introductionmentioning

confidence: 99%

“…By utilizing the memory virtualization support of modern CPU(such as Intel VT-x's Extended Page Tables and AMD SVM's Nested Page Tables), Captive [16] and another scheme of Faravelon et al [10] achieved significant speedup too. The main idea is running emulators in guest kernel mode to directly control page mappings and rely on the second level address translation hardware to translate emulators' addresses.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

BTMMU: an efficient and versatile cross-ISA memory virtualization

Huang

Zhou

et al. 2021

Proceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments

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“…Hence, it is not suitable to use some deep and complex optimization methods. Even though there are many optimization methods, such as hot path optimization [15], register mapping optimization [16], [17], multi-threaded parallel optimization [9] and memory access optimization [18], which can improve the efficiency of dynamic binary translation effectively, the problem of low efficiency in dynamic binary translation is still prominent. Generally speaking, DBT has drawn much attention in research and application for its good completeness and adaptability [19].…”

Section: Introductionmentioning

confidence: 99%

Dynamic Translation Optimization Method Based on Static Pre-Translation

Wang¹,

Pang²,

Liu³

et al. 2019

IEEE Access

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Binary translation technology is an effective method to solve the problem of software cross-platform transplantation, especially for software porting without source code. Static binary translation has a good translation effect in general, but it faces the problem of code discovery. Dynamic binary translation can completely reproduce the execution process of the source program according to the execution order of the binary code. But it is severely limited by its low efficiency, as the time of translation is part of the whole runtime and it is no time for better code optimization in dynamic binary translation. This paper aims to optimize the execution process of dynamic binary translation by taking full advantage of the strengths of static binary translation. An optimization method of dynamic binary translation with static pre-translation was proposed in this paper. By pre-translating the source program and using more in-depth code optimization method to optimize the translated code, most of the code translation time can be cut down and the translated code will be more efficient. A new dynamic translation framework with the static pre-translation module, based on the dynamic translator named QEMU (a quick emulator), was designed to translate the x86 program to the Sunway platform. As the experimental results show, the framework and optimization method are valid to improve the efficiency of the general dynamic translator.

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Optimizing Memory Access Performance Using Hardware Assisted Virtualization in Retargetable Dynamic Binary Translation

Cited by 4 publications

References 11 publications

A Dynamic and Static Binary Translation Method Based on Branch Prediction

A Dynamic and Static Binary Translation Method Based on Branch Prediction

BTMMU: an efficient and versatile cross-ISA memory virtualization

Dynamic Translation Optimization Method Based on Static Pre-Translation

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