Optimum design of high power and high efficiency mm‐wave fundamental oscillators

SUMMARY The Internet of Everything (IoE), clearly a 21st century's technology, brilliantly plays with digital data obtained from analog sources, bringing together two different realities, the analog (physical/real), and the digital (cyber/virtual) worlds. Then, with the boundaries of IoE still analog in nature, the required functions at the interface involve sensing, measuring, filtering, converting, processing, and connecting, which imply that the analog layer governs the entire system in terms of accuracy and precision. Furthermore, such interface integrates several analog and mixed‐signal subsystems that comprise mainly signal transmission and reception, frequency generation, energy harvesting, data, and power conversion. This paper sets forth a state‐of‐the‐art design perspective of some of the most critical building blocks used in the analog/digital interface, covering wireless cellular transceivers, millimeter‐wave frequency generators, energy harvesting interfaces, plus, data and power converters, that exhibit high quality performance achieved through low‐power consumption, high energy‐efficiency, and high speed.

Section: Millimeter‐wave Frequency Generatorsmentioning

confidence: 99%

Bird's‐eye view of analog and mixed‐signal chips for the 21st century

Martins

Mak

Chan

et al. 2021

“…However, the problem is that it is impossible to calculate the ideal inductance L from Equation , and it is necessary to find the value of L by try and error procedure in temporal simulation. In fact, if G m is written for total two‐port (including transistor and lossy inductor), we obtain

G_{m} = ((), g_{11 L} + g_{22 L} + G_{d}) + ((), g_{12 L} + g_{21 L}) cos φ - ((), b_{12 L} - b_{21 L}) sin φ = 0,

where g ij L and b ijL ; i , j = are, respectively, the real and imaginary parts of large‐signal admittance matrix in common source configuration. For given input stimulation amplitude and oscillation frequency, each of g ijL and b ijL has a specific value; therefore, the value of G d can be obtained.…”

Section: Estimation Of Amplitude Near Foscmaxmentioning

confidence: 99%

“…Accordingly, this method can be easily applied to any structure that can be separated into similar two ports. The major difference between our work and other optimization methods (such as the one presented in Shirinabadi et al which intends to maximize the power) is that by using our method, we can obtain the desired frequency and output power with a suitable precision. First, our purpose is to design an oscillator that has the maximum oscillation frequency with a known output power and unknown passive network topology and number of required stages.…”

Section: Introductionmentioning

confidence: 98%

“…Although it is possible to obtain frequencies higher than f max by using multipliers and harmonic oscillators, designers usually fabricate high‐power signal sources using fundamental structures. The intrinsic limitations of achieving higher powers at frequencies close to f max are substrate losses and low‐quality factor of passive elements . These limitations cannot be fully eliminated, however, by changing the topology and design in an appropriate way; their adverse effects can be significantly reduced.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Analysis of power‐frequency trade‐offs in millimeter‐wave CMOS oscillators

Afzalian

Naimi

Dousti

2019

In this paper, considering the nonlinear effects in two ports consisting of transistor, a general method is proposed for estimating the amplitude of high-frequency ring oscillators. The proposed method can be generalized to various structures that can be disassembled into similar two ports. Moreover, in each CMOS process, a design procedure can be followed to obtain the desired output power and frequency. This is the first time that the frequency and amplitude of oscillator are related to each other in a system of nonlinear equations. First, considering the maximum achievable oscillation frequency, the analysis of ring oscillator structure is performed for the given output power. The results show that the proposed structure operates at 7 to 18% higher oscillation frequency compared with conventional structures. In the next step, assuming that the oscillator structure and passive network topology are known, another system of nonlinear equations is defined for designing the oscillator for the given frequency and amplitude of oscillation. Finally, the implicit solution, which includes the passive network elements connecting to the transistor, is obtained.The results of equations follow the simulation results with an acceptable error (1% frequency error and about 5% amplitude error). /journal/cta 84 84 102 analysis). 3-9 Although most of the mentioned analyses are successful to a large extent in their intended frequency range, there exist some issues when it comes to amplitude analysis of high-frequency oscillators:A: Since the active device model is much more complicated at high frequencies, the order of differential equations describing its structure is higher, and this practically inhibits the analysis.B: The existing methods are not general, and for each individual structure, a specific process must be contemplated. However, one prefers to use a generalized method for analyzing various oscillators.The milestone of these efforts was where the researchers avoided the mentioned issue and focused on the use of twoport network parameters of transistor, and in this way, they were able to provide a new formulation for optimal oscillator designs. Accordingly, amplitude analysis of high-frequency oscillators near the f max of transistor is a subject that has been rarely investigated. It is worth mentioning that the designing of an optimal oscillator with emphasis on the optimization of the output power has been thoroughly investigated in Gilmore and Rosenbaum. 10 In more precise words, for given dimensions of an active device, some conditions are imposed on the passive network parameters [Y] and [S] so that the oscillator can operate at its maximum possible output power. Recently, Momeni and Afshari showed that it is possible to approach an optimal oscillator design by separating ring structures into the building two ports and analyzing them. 11 Using another approach, Sharma and Krishnaswamy designed a high-frequency ring oscillator with the maximum power gain in each stage. 12 However, these methods are based on smal...

“…As important building blocks in ADASs, millimeter‐wave (mm‐wave) radar sensors with high spatial resolution and low atmospheric attenuation have attracted great attentions on research and development in recent years. Currently, two mm‐wave bands are mainly applied for automotive radar sensors, one is K band at 24 GHz for short‐range applications such as blind‐spot detection and collision avoidance, the other is E band at 77 GHz for long‐range radar communication as adaptive cruise control 1–3 . Attributed to constantly shrinking dimensions of devices, complementary metal oxide semiconductor (CMOS) technology becomes a great competitor of III–V technologies, such as GaAs, InP, and pHEMT, to implement the high performance mm‐wave automotive radars, featuring low cost, low power, compact size, and high integration with analog/digital integrated circuits (ICs) 4,5 …”

Section: Introductionmentioning

confidence: 99%

A K‐band high‐gain power amplifier with slow‐wave transmission‐line transformer in 130‐nm RF CMOS

Hou

Pan

et al. 2021

Summary This paper presents a K‐band high‐gain Class‐A power amplifier (PA) with the two‐way combining approach in GSMC 130‐nm radio frequency (RF) complementary metal oxide semiconductor (RF CMOS). At the input, a slow‐wave transmission‐line transformer (S‐TLT) matching network is proposed for simultaneously realizing the impedance transformation and the single‐ended RF signal to differential conversion. Transmission‐line transformers (TLTs) are employed between the stages for coupling and inter‐stage matching. To improve the output power and efficiency, the placing and routing of the transistor layout are considered carefully for power stages to reduce the interconnecting and overlapping parasitics significantly. The PA has been fabricated and achieved good matching at 25 GHz, power gain of 17.8 dB, saturated output power of 14.9 dBm, output 1‐dB compression point of 12.4 dBm, and power added efficiency of 13.7% at a supply voltage of 1.5 V.