Output Interface With Latching Driver for LTS-SFQ Circuits

Abstract

We propose an output interface with a latching driver for single-flux-quantum (SFQ) circuits operating at 4.2 K. An optimum critical current density of the latching driver was discussed, and a multichip module (MCM) structure with SFQ circuits and latching drivers was proposed for 40-Gb/s operation. To optimize of the latching driver, we calculated the punchthrough probability of Nb-Al-AlO -Nb junctions and high-temperature superconductor (HTS) junctions. The Nb junction with a of 45 kA/cm 2 , which has a hysteresis of 44% for the latching operation, leads to a punchthrough probability lower than 10 15 for an ideal ac-bias of 40 GHz. On the other hand, ramp-edge-type interface-modified junctions based on YBa 2 Cu 3 O 7 have an optimum of 60 kA/cm 2 that gives the smallest punchthrough probability lower than 10 15 for an ideal ac-bias of 40 GHz without any shunt capacitance. Because the optimum of 45 kA/cm 2 for the latching driver is too large to fabricate large-scale integrated SFQ circuits with the Nb junction, the MCM structure consisting of SFQ circuits and latching drivers with the optimum is important to prepare 40-Gb/s SFQ systems. The of 60 kA/cm 2 is a practical value for the HTS junctions, and use of the low-temperature superconductor (LTS)-HTS MCM structure is also one way to realize the high-speed SFQ systems.Index Terms-Interface circuit, latching driver, multichip module (MCM), punchthrough, single-flux quantum (SFQ).

Fabrication of Inductively-Coupled Double-Josephson Junctions Using High-Temperature Superconductors

“…In order to amplify the SFQ output voltage, it is necessary to connect multiple junctions serially and switch simultaneously. Some LTS output interfaces have already been fabricated [5]- [7]. However, the established LTS output interface has a lot of problems.…”