“…After all, it is an impractical endeavor to design a perfect CP with optimal performance in every aspect. Apart from this, Figure 21(a) also provides lists of commonly tuned parameters including clock amplitude [10,16,53,105], N-stage [53,103,104], Cpump or Cout [10,12,95], frequency [15,62] , Rload [32,33] and CMOS technology node [32,106]. Here, Rload and CMOS technology node are included as one of the tunable parameters since both of them can be defined by the designer during the design process even though they are barely discussed in previous sections.…”