Overlay target design and evaluation for SADP process

Yeh, Chau‐Shioung; Huang, Chao-Tien Healthy; Lin, Kengchi; Huang, Chi‐Hsiang; Yang, Elvis; Yang, T. H.; Chen, K. C.; Lu, Chih‐Yuan

doi:10.1117/12.914439

Cited by 11 publications

(3 citation statements)

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“…One way to increase the mark visibility is to build multiples of them. Since we are using the SADP process, we can multiply the number of spacers through the use of segmentation method (Figure 3), such as the one introduced by reference [1]. We also explore the method under different process conditions.…”

Section: Figure1: Cell Mask Sadp Process Schemementioning

confidence: 99%

Image based overlay target segmentation in memory SADP process

Lei-Ye

Huayong-Hu

Weiming-He

2016

2016 China Semiconductor Technology International Conference (CSTIC)

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Self-Aligned Double Patterning (SADP) is widely applied in advanced sub-4X patterning technology, especially for the 1D resolution shrinkage of memory technology. As the application of SADP makes lithography minimum pitch down to half of design pitch with the remaining spacer aside core, its alignment mark and overlay (OVL) mark have to be well-segmented to ensure enough mark contrast. In this paper, we designed two types of image based overlay (IBO) bar in bar (BIB) OVL target: bar-segmentation and background-segmentation with different duty ratio. Based on these two designed types of marks, we focus on the OVL of 2nd photo layer to 1st SADP layer with the core removed (which means spacer grating structure remained). We studied the effect of the overlay target segmentation on the precision and robustness of wafer-level overlay performance. Different lithography processes were also studied, including single layer lithography and tri-layer lithography with planarized spacer grating structures. We found there are strong correlations between overlay measurement accuracy and background segmentation rules. The results of our study will be presented and discussed in this paper.

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Section: Figure1: Cell Mask Sadp Process Schemementioning

confidence: 99%

Image based overlay target segmentation in memory SADP process

Lei-Ye

Huayong-Hu

Weiming-He

2016

2016 China Semiconductor Technology International Conference (CSTIC)

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“…[10][11][12] There are also several research studies for evaluating and minimizing target noise. [13][14][15] This paper proposes a new overlay target to solve these two problems.…”

Section: Conventional Overlay Target Designmentioning

confidence: 99%

Image-based overlay target design using a grating intersection

Lee¹,

Chang²,

Shin³

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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Background: An overlay target design is essential before performing overlay metrology and has a great impact on overlay performance. In addition, accurate overlay metrology is required to achieve high product yields in semiconductor manufacturing. When asymmetry of the overlay target occurs, it is necessary to increase the area of the pattern existing in the target and stabilize the optical aberration for stable measurement. For this reason, we propose an image-based overlay target design that can secure a larger area compared with the existing overlay target and stabilize the optical aberration by overlapping and exposing the upper and lower patterns of the overlay target.Aim: The effective area of the existing mark design is improved by proposing an overlay target and a measurement method used in image-based overlay measurement.Approach: The proposed overlay target design is configured by arranging different marks orthogonally to the upper and lower layers, and different two-dimensional information can be inserted in the same area. When necessary, single-dimensional information desired by the user can be obtained through a technique called projection, and it has the advantage of using a larger effective area than the existing overlay target.Results: Overlay can be measured using projected signal components, and the possibility and performance of the proposed target can be confirmed through simulation and test wafer. In addition, it was possible to bring about a 15% improvement in total measurement uncertainty performance compared with the existing advanced imaging metrology (AIM) target by taking a wider effective area.Conclusions: An overlay target design is proposed to solve the technical problems of the existing overlay target design. The proposed overlay target has a method that is capable of minimizing the size of the overlay target while maximally maintaining the signal density, a way of reducing the influence of aberration, and various other advantages.In addition, the proposed method provides a design rule that breaks the "lower pattern and upper pattern must not overlap" framework.

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“…The standard metrology target usually composed of two 180º symmetrical target features for each X and Y directions from the current lithography step in the photoresist layer and previous step in one of the preceding layers. Small AIMid targets of 5x5 μm 2 have been previously demonstrated 4 . The Multilayer targets extend the binary AIMid targets and include multiple targets features from different layers being printed in close proximity to each other such that the tools' microscope adequately captures these different features in a single field of view image.…”

Section: Introductionmentioning

confidence: 97%

Multi layer overlay measurement recent developments

et al. 2013

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One of the main challenges related to the growing number of Litho layers and most specifically to Multi Patterning, is the ability to align to many layers at once. In the past things were simple, the alignment tree was set so that every layer aligns to one layer and at the most is measured versus two layers, such as contact to poly and Isolation. Today, even at the 20 nm node there are double and triple patterning for critical layers such as Isolation, poly, contact and Metal 1. This forces a much more complex alignment tree and Overlay (OVL) measurement. Layers are sometimes aligned to an average of previous layers, to different layers at different orientations and disposition is done based on several measurements. This growing challenge increases the number of Overlay measurements significantly, increases the target area and present the need to make many measurement from different layers consistent. Another challenge is the increased number of recipes and the need for flexible alignment tree scheme during development. These challenges are addressed by Multi layer targets such as Triple AIM, Multilayer AIMid and the Blossom and micro-Blossom targets where alignment marks from multiple patterning steps and layers were densely populated. A single OVL reading is calculated by the metrology tool on a selected pair or multiple pair average 1 .Here we propose the Multi-Layer measurement that provides an additional degree of metrology and solution to these challenges: in one measurement several overlay results are achieved, the results are always self-consistent. It allows at the same measurement grab to look back and disposition previous layers after their processing was completed. It allows a flexible alignment tree without the need to add or change targets, even during ramp and production. It reduces the number of recipes that need to be created and managed. And it also reduces significantly the area needed for the targets. In this paper we will show recent results from IMEC, on Back-End (BE) stack of four layers including one double patterning layer. We compared several target sizes, showing that such a target can fit within the Indie requirements of 10x10 μm. Results show that there is not a lot of need to compromise on performance in order to get good Multi-Layer measurements. Eventually we will describe process compatible targets which are needed more in the Front End (FE) layers. Looking forward at the increased complexity needed for future nodes and multiple pitch splitting lithography, it is encouraging to see that for Overlay we can simplify metrology instead of making it follow the complexity trend.

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Overlay target design and evaluation for SADP process

Cited by 11 publications

References 0 publications

Image based overlay target segmentation in memory SADP process

Image based overlay target segmentation in memory SADP process

Image-based overlay target design using a grating intersection

Multi layer overlay measurement recent developments

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