Oxide Thin-Film Transistor-Based Vertically Stacked Complementary Inverter for Logic and Photo-Sensor Operations

Abstract

Numerous studies have addressed the utilization of oxide thin-film transistor (TFT)-based complementary logic circuits that are based on two-dimensional (2D) planar structures. However, there are fundamental limits to the 2D planar structured complementary logic circuits, such as a large dimension and a large parasitic resistance. This work demonstrated a vertically stacked three-dimensional complementary inverter composed of a p-channel tin monoxide (SnO) TFT and an n-channel indium-gallium-zinc oxide (IGZO) TFT. A bottom-gate p-channel SnO TFT was formed on the top-gate n-channel IGZO TFT with a shared common gate electrode. The fabricated vertically stacked complementary inverter exhibited full swing characteristics with a voltage gain of ~33.6, a high noise margin of 3.13 V, and a low noise margin of 3.16 V at a supplied voltage of 10 V. The achieved voltage gain of the fabricated complementary inverter was higher than that of the vertically stacked complementary inverters composed of other oxide TFTs in previous works. In addition, we showed that the vertically stacked complementary inverter exhibited excellent visible-light photoresponse. This indicates that the oxide TFT-based vertically stacked complementary inverter can be used as a sensitive photo-sensor operating in the visible spectral range with the voltage read-out scheme.

Vertically Integrated Electronics: New Opportunities from Emerging Materials and Devices

“…Conventional lithography-based patterning and etching are the representative methods for via-hole forming process. Most of metal oxide semiconductors and chemically robust 2D semiconductor materials are compatible with the lithography and wet/dry etching methods, and thus, via-hole forming methods based on etching have been widely used for those materials [ 25 , 26 , 32 ]. However, it is difficult to apply conventional lithography-based via-hole processes into 3D stacked organic devices because developers containing an organic solvent, plasma, or high-temperature process can damage the vulnerable semiconductors such as organic materials and thus can impair the device performance significantly [ 33 – 35 ].…”

“…It was also noted that the device performance can be further improved by optimizing the channel geometry of the two TFTs and the thickness of the gate dielectric. Joo et al [ 25 ] implemented the vertically integrated inverter using SnO, another p-type metal oxide semiconductor, along with IGZO TFT. A shared gate structure was utilized to achieve the inverter, and the interconnection between the drain electrodes of the top and bottom TFTs was made through via-holes formed by etching (Fig.…”

“…d A schematic of vertically stacked complementary inverter composed of a p-type SnO and an n-type IGZO TFTs. e Voltage transfer characteristics of a complementary inverter in which n-type IGZO TFT and p-type SnO TFT are vertically stacked when V DD is 6, 8, and 10 V. f Change in the inverter characteristics according to red, green, and blue light application [ 25 ]. Copyright © 2019, MDPI.…”

“…As an alternative approach, vertical integration has been considered a promising strategy to circumvent the issues in conventional silicon MOSFETs. Rather than top-down fabrication of silicon technologies, tremendous efforts on bottom-up process-based transistors and electronics have been made by adopting emerging semiconductor materials including transition metal dichalcogenides (TMDs) [ 12 – 14 ], graphene [ 15 , 16 ], carbon nanotubes (CNTs) [ 17 – 19 ], organics [ 20 – 23 ], metal oxides [ 24 , 25 ], and combinations of those materials [ 26 , 27 ]. The largest difference from the conventional silicon MOSFETs is that each material can be simply deposited, which makes layer-by-layer vertical stacking available.…”

Effects of Capping Layers with Different Metals on Electrical Performance and Stability of p-Channel SnO Thin-Film Transistors

“…However, fabricating p-channel oxide TFTs consisting of electrical performance comparable to that of n-channel oxide TFTs remain a challenge. Complementary logic circuits using both n-and p-channel field-effect transistors (FETs) have several advantages, such as higher noise margin, lower power consumption, higher integration density, higher gain, and simpler biasing over electronic circuits consisting of only n-channel FETs [21][22][23][24][25][26][27][28]. Therefore, it is important to improve the electrical performance and stability of p-channel oxide TFTs to expand the application area of oxide TFTs to more sophisticated electronic systems.…”