P‐1.14: The Influence of Bottom gate Dielectric Roughness on the Performance of Double‐Gate a‐IGZO Thin Film Transistors

Abstract

In this paper,double gate amorphous indium gallium zinc oxide thin film transistors (a‐IGZO TFTs)are investigated in which we use SiO2 deposited by plasma enhanced chemical vapor deposition(PECVD) as bottom‐gate dielectric with different roughness measured by AFM. Our results show that the devices with smaller roughness of bottom‐gate dielectric, which is able to decrease the interface scattering between a‐IGZO surface conducting channel and gate dielectric, can get much larger on state currents and bigger field effect mobilities.Besides,the devices still have good interface properties according to hysteresis curves.

P‐4.1: Dual‐Gate Indium‐Gallium‐Zinc Oxide Thin‐Film Transistor with an Inserted Top Gate

“…Dual-gate (DG) thin-film transistors (TFTs) based on indium-gallium-zinc oxide (IGZO) have been widely studied and are applied to achieve high performance circuits and sensors, with the advantage of independently control of the channel of a TFT by bottom-gate (BG) and top-gate (TG) electrodes. However, the TG electrode is usually put above the film stackings of source/drain (S/D) metal electrodes followed by an oxide spacing layer and thus the effective insulator layer of TG is restricted to be thick [1][2][3]. In this study, DG TFT with an inserted TG electrode between the channel and S/D electrodes is developed based on the elevated-metal (EM) bottom-gate TFT structure [4] .…”