P.18: Effects of Interface and Bulk States on the Stability of Amorphous InGaZnO Thin Film Transistors under Gate Bias and Temperature Stress

Abstract

The gate bias and temperature instability of InGaZnO TFTs were improved by adopting double stacked channel layer (DSCL). The mechanism of Vth shift under stress was studied by this structure. An interface with of less oxygen plasma damaging and lower oxygen vacancies in bulk were achieved by DSCL, resulting in a higher stability of Vth.

Light illumination stability of amorphous InGaZnO thin film transistors with sputtered AlOxpassivation in various thicknesses

“…[15][16][17][18] It should be noted that quite many related studies have only focused on the a-IGZO TFTs without passivation, but in real production passivation is essential to ensure devices' stability by keeping their active layers from interacting with external environments. 17,19,20) Therefore, investigating the dependence of light illumination stability properties on passivation layers of a-IGZO TFTs is meaningful for mass production of this novel technology.…”

Process development of inverted‐staggered amorphous InGaZnO thin‐film transistors with wet‐etched electrodes

“…After many experimental studies, a 50‐nm‐thick active layer was used in our devices. Besides, double‐stacked channel layer structure was also employed to improve the performance and stability of a‐IGZO TFTs . Third, plasma damage from passivation deposition might apparently degrade device performance of a‐IGZO TFTs, so effective measures must be taken to decrease this damage.…”

“…(a), evident transfer characteristic emerged in this device. The typical TFT performance parameters were extracted from the above curves, where threshold voltage (V th ) and field‐effect mobility (μ FE ) were extracted graphically from the square root of drain current, I ds 1/2 , versus gate voltage V gs in saturation region using the intercept and maximum slope . SS was obtained from the half value of the difference between the gate voltages corresponding to drain current of 10 −10 and 10 −8 A, respectively .…”

“…The oxygen‐rich films were sputtered with mixed gas flow of Ar/O 2 = 30/3 sccm, while the oxygen‐poor ones were prepared with pure argon flow, that is, Ar/O 2 = 30/0 sccm. For the active layer of a‐IGZO TFTs, double‐stacked channel layer structure, that is, 20‐nm‐thick oxygen‐poor IGZO layer followed by 30‐nm‐thick oxygen‐rich IGZO film, was used; details of which have been discussed elsewhere …”

Modulation of Interface and Bulk States in Amorphous InGaZnO Thin-Film Transistors with Double Stacked Channel Layers

“…11) Recently, it has been reported by our group and other researchers that a TFT with a double-stacked channel layer (DSCL) might exhibit better performance and stability since its interface and bulk states could be effectively modulated. 12,13) However, those previous reports have not clearly explained the mechanism underlying the improvement. Moreover, design rules for DSCLs, e.g., how to define the thickness in DSCL IGZO-TFTs are still unclear.…”