Packaging the Blue Gene/L supercomputer

Abstract

As 1999 ended, IBM announced its intention to construct a onepetaflop supercomputer. The construction of this system was based on a cellular architecture-the use of relatively small but powerful building blocks used together in sufficient quantities to construct large systems. The first step on the road to a petaflop machine (one quadrillion floating-point operations in a second) is the Blue Genet/L supercomputer. Blue Gene/L combines a low-power processor with a highly parallel architecture to achieve unparalleled computing performance per unit volume. Implementing the Blue Gene/L packaging involved trading off considerations of cost, power, cooling, signaling, electromagnetic radiation, mechanics, component selection, cabling, reliability, service strategy, risk, and schedule. This paper describes how 1,024 dual-processor compute application-specific integrated circuits (ASICs) are packaged in a scalable rack, and how racks are combined and augmented with host computers and remote storage. The Blue Gene/L interconnect, power, cooling, and control systems are described individually and as part of the synergistic whole.

A system level view of Petascale I/O on IBM Blue Gene/P

“…The Blue Gene/P system design [1] is very similar to Blue Gene/L [2][3][4]. Blue Gene compute nodes (CNs) run the user application on a lightweight compute node kernel (CNK), and do not have direct TCP/IP connection to an external network.…”

Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing

“…As a power density comparison, consider the GFLOPS/W of the prototype cluster with ML-310 boards versus the IBM BlueGene/L. Our quick-and-dirty design is about 0.2 GFLOPS/W while BlueGene/L reports 0.228 GFLOPS/W [7]. This suggests that (a) cooling a petascale FPGA cluster will be feasible and (b) that it is possible to use design specialization and custom architectures to compensate for the inherent power disadvantages of FPGAs in place of an ASIC.…”

Mixed-radix Twisted Torus Interconnection Networks

“…Note that these values correspond to the size of the Torus network of the largest configuration of the BlueGene [7]. Figure 9 compares PT, PTT and PDTT in terms of throughput and latency under uniform traffic.…”

“…In this work, we will focus just on networks with 2 : 1 and 2 : 1 : 1 aspect ratios. These ratios have been previously used by manufacturers [10,7], allowing the number of nodes to be a power of two, which is sometimes a desired property. Even more, these ratios represent the simplest way to upgrade a square or cubic network, doubling their number of nodes by only rearranging some peripheral links.…”