Lecture Notes in Computer Science
DOI: 10.1007/978-3-540-74472-6_16
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Page Replacement Algorithms for NAND Flash Memory Storages

Abstract: Experiments through simulation studies show that the proposed algorithms reduce the number of erase operations and improve the wear-leveling degree of flash memory compared to LRU and CFLRU.

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Cited by 27 publications
(17 citation statements)
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“…Five algorithms were included in our experiments: CASA, LRU (representing conventional buffer algorithms), and the flashaware algorithms represented by CFLRU, CCFLRU, and LRUWSR. We did not include the CFLRU variants [9] and CFDC [5], due to two reasons: 1. All of them require the tuning of a parameter controlling the sizes of two buffer regions-the same limitations represented by CFLRU; 2.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…Five algorithms were included in our experiments: CASA, LRU (representing conventional buffer algorithms), and the flashaware algorithms represented by CFLRU, CCFLRU, and LRUWSR. We did not include the CFLRU variants [9] and CFDC [5], due to two reasons: 1. All of them require the tuning of a parameter controlling the sizes of two buffer regions-the same limitations represented by CFLRU; 2.…”
Section: Methodsmentioning
confidence: 99%
“…Although its authors have mentioned a dynamic version of CFLRU, which automatically adjusts the parameter "based on periodically collected information about flash read and write operations" [4], its control logics is not presented. Yoo et al proposed several variants of CFLRU [9], aiming at reducing the number of flash erase operations and improving wear-leveling. These variants have the same limitation as CFLRU and their design goals are different from ours.…”
Section: Related Workmentioning
confidence: 99%
“…The victim for the eviction is the page in the clean-first region. The CFLRU/C, CFLRU/E, and DL-CFLRU/E [41] added more flexibility in choosing the victim, by referencing the access frequency and block erase count. For example, in CFLRU/C, if no clean page is available for the eviction, then the dirty page with the lowest access frequency will be selected as a candidate.…”
Section: Related Studiesmentioning
confidence: 99%
“…NAND Flash usually uses page as unit to read and to write, when it needs to write a page of data into Flash, the controller send the programming instructions, data memory address and 2KB, Flash chip inside the pages automatically complete the programming operation. In the automatic programming, Flash chip through an internal program to save the data from the data register to the designated storage space, the "R /" "B" port will be pulled low, which means that the chip is in a busy working condition, the process required typical time is 200μs, the maximum time is 700μs [6][7][8]. Under normal circumstances, the controller needs to wait at the end of Flash internal the page program, which can continue to store data to Flash.…”
Section: Information Management Systemmentioning
confidence: 99%