Panel-Based Large-Scale RDL Interposer Fabricated Using 2-μm-Pitch Semi-Additive Process for Chiplet-Based Integration

Kawamura, Hiroshi; Takano, Takamasa; Tanaka, Masaya; Mawatari, Hiroshi; Kitayama, Daisuke; Tai, Takahiro; Tsunoda, Tsuyoshi; Kuramochi, Satoru

doi:10.1109/ectc51906.2022.00137

Cited by 13 publications

(5 citation statements)

References 10 publications

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“…The output tensor of the convolution network can be compressed into a vector of size QLin. Q Lin = P nx × P ny × P nz (11) where Pnx, Pny and Pnz are the output tensor size in the X, Y and Z directions, respectively. The hidden layer can be represented by vector as (10):…”

Section: Ann Architecturesmentioning

confidence: 99%

“…Q Lin = P nx × P ny × P nz (11) where P nx , P ny and P nz are the output tensor size in the X, Y and Z directions, respectively.…”

Section: Ann Architecturesmentioning

confidence: 99%

“…To enable high-bandwidth signal processing between chiplets [ 10 ], several techniques, such as dual damascene processing, semi-additive processing (SAP) and polymer damascene processing, have been introduced. These techniques narrow the RDL trace width/pitch to as small as two microns [ 11 , 12 ] and even sub-microns [ 13 ]. To enhance the electricity transmission capacity, traces become thicker, with an aspect ratio of up to 4.2 [ 14 ], which is very different from traditional shell-like thin traces.…”

Section: Introductionmentioning

confidence: 99%

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An RDL Modeling and Thermo-Mechanical Simulation Method of 2.5D/3D Advanced Package Considering the Layout Impact Based on Machine Learning

Wu,

Wang,

et al. 2023

Micromachines

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The decreasing-width, increasing-aspect-ratio RDL presents significant challenges to the design for reliability (DFR) of an advanced package. Therefore, this paper proposes an ML-based RDL modeling and simulation method. In the method, RDL was divided into blocks and subdivided into pixels of metal percentage, and the RDL was digitalized as tensors. Then, an ANN-based surrogate model was built and trained using a subset of tensors to predict the equivalent material properties of each block. Lastly, all blocks were transformed into elements for simulations. For validation, line bending simulations were conducted on an RDL, with the reaction force as an accuracy indicator. The results show that neglecting layout impact caused critical errors as the substrate thinned. According to the method, the reaction force error was 2.81% and the layout impact could be accurately considered with 200 × 200 elements. For application, the TCT maximum temperature state simulation was conducted on a CPU chip. The simulation indicated that for an advanced package, the maximum stress was more likely to occur in RDL rather than in bumps; both RDL and bumps were critically impacted by layouts, and RDL stress was also impacted by vias/bumps. The proposed method precisely concerned layout impacts with few resources, presenting an opportunity for efficient improvement.

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Section: Ann Architecturesmentioning

confidence: 99%

“…Q Lin = P nx × P ny × P nz (11) where P nx , P ny and P nz are the output tensor size in the X, Y and Z directions, respectively.…”

Section: Ann Architecturesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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An RDL Modeling and Thermo-Mechanical Simulation Method of 2.5D/3D Advanced Package Considering the Layout Impact Based on Machine Learning

Wu,

Wang,

et al. 2023

Micromachines

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“…Figure14 show L/S=1/1um trace with protective layer. Nonorganic layer enhance highly reliability on the narrow pitch under 4um[3].…”

mentioning

confidence: 99%

High Speed Transmission Characteristics on Glass Based Interposers

Kuramochi,

Tanaka,

Tai

2024

IMAPSource Proceedings

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Interposers for system in package will became more and more important for advanced electronic systems. As the industry moves toward HPC (High Performance Computing) for huge data transmission with low power consumption. The major engineering requirements for HPC application are highdensity, high speed data transmission, low loss, precision manufacturing and low cost. On the 2.5D heterogenous package structure, key technology is fine wiring connected with CPU chip and HBM chips. The fine wires needed high speed transmission. This paper presents the demonstration of Glass-based twin type interposers, Glass interposer with fine pitch metalized through via and RDL interposer with low loss dielectrics on Glass carrier. We compare twin types of Interposes fabrication process capability with panel size format 300x400mm. Finally, we compare the transmission characteristics using eye diagram for heterogenous integration application. Glass Interposer has low loss glass via, it is effective vertical interconnection. RDL interposer has low loss dielectric layers, excellent transmission characteristics obtained on fine pitch trace area.

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“…To reduce the number of metal layers needed to achieve this complex routing, the critical dimensions of the RDL lines must be decreased [1]. Among the various options recently proposed [2][3][4], the most promising approach utilizes a dual damascene patterning with copper lines embedded in a high-resolution photosensitive polymer [1,5]. Owing to the chemical-mechanical polishing (CMP) step of the damascene process, the flatness of the stack is guaranteed, enabling additional metal layers to be processed at resolution limit.…”

mentioning

confidence: 99%

Inorganic Capping Layers in RDL Technologies: Process Advantages and Reliability

Chery

Bhatia

Pinho

et al. 2023

JOM

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Atomic layer-deposited (ALD) inorganic films were processed on top of copper metal lines in a polymer-based redistribution layer (RDL). The primary objective was to develop capping layers thinner than 15 nm to prevent copper oxidation. Due to their uniformity and high density, ALD layers are established permeation barriers. Nonetheless, owing to the presence of polymers in the final product, a low deposition temperature is required, resulting in an increased defect density and a greater susceptibility to degradation by moisture. In this study, various inorganic cappings, based on Al2O3, HfO2 and TiO2, deposited at 100 °C were integrated in an RDL stack. It is demonstrated that they impede the reaction of the polymer photo acid generator with copper, improving the lithography process, and ultimately allowing to print smaller critical dimensions. Additionally, capping layers built upon Al2O3 or HfO2 are shown to fully block copper oxidation after reliability stress tests.

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Panel-Based Large-Scale RDL Interposer Fabricated Using 2-μm-Pitch Semi-Additive Process for Chiplet-Based Integration

Cited by 13 publications

References 10 publications

An RDL Modeling and Thermo-Mechanical Simulation Method of 2.5D/3D Advanced Package Considering the Layout Impact Based on Machine Learning

An RDL Modeling and Thermo-Mechanical Simulation Method of 2.5D/3D Advanced Package Considering the Layout Impact Based on Machine Learning

High Speed Transmission Characteristics on Glass Based Interposers

Inorganic Capping Layers in RDL Technologies: Process Advantages and Reliability

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