Parabolic synthesis methodology implemented on the sine function

Hertz, Erik; Nilsson, Peter

doi:10.1109/iscas.2009.5117733

Cited by 14 publications

(7 citation statements)

References 4 publications

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“…That is, the choice of function is given by the (small) table of coefficients. In earlier papers, it was shown that Parabolic Synthesis can be used with good results on several functions (e.g., the sine function [9] and the exponential function [11]). Since the Harmonized version of Parabolic Synthesis, presented in the current paper, can be applied to any functions (even without the limitations of earlier methods) it can be concluded that it is an efficient method for a wide class of functions.…”

Section: Resultsmentioning

confidence: 99%

“…This is computed by inserting the value of x for the starting point of the interval, x start,i , of the help function, f help (x), (4) as shown in (8) Eq. (8) does not apply on the start value of the first interval, which has to be calculated as the limit according to (9). Since the x 2 term in (9) goes faster towards 0 than the x term, it can be excluded when calculating the limit, as shown in (9).…”

Section: The Second Sub-functionmentioning

confidence: 99%

“…The Parabolic Synthesis methodology [8][9][10][11] is founded on a multiplicative synthesis of factors, each of them a secondorder function. The more factors that are used, the higher the accuracy of the approximation is.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control

Hertz

Lai

Svensson

et al. 2017

J Sign Process Syst

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The Harmonized Parabolic Synthesis methodology is a further development of the Parabolic Synthesis methodology for approximation of unary functions such as trigonometric functions, logarithms and the square root with moderate accuracy for ASIC implementation. These functions are extensively used in computer graphics, communication systems and many other application areas. For these high-speed applications, software solutions are not sufficient, and a hardware implementation is therefore needed. The Harmonized Parabolic Synthesis methodology has two outstanding advantages: it is parallel, thus reducing the execution time, and it is based on low complexity operations, thus being simple to implement in hardware. A difference compared to other approximation methodologies is that it is a multiplicative, and not additive, methodology. Compared to the Parabolic Synthesis methodologies it is possible to significantly enhance the performance in terms of reducing chip area, computation delay and power consumption. Furthermore, it increases the possibility to tailor the characteristics of the error, improving conditions for subsequent calculations. To evaluate the methodology, the fractional part of the logarithm is implemented and its performance is compared to the Parabolic Synthesis methodology. The comparison is made with 15-bit resolution. The design implemented using the proposed methodology performs 3× better than the Parabolic Synthesis implementation in terms of throughput, while consuming 90% less energy. The chip area is 70% smaller than for the Parabolic Synthesis methodology. In summary, the new technology further increases the advantages of Parabolic Synthesis.

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Section: Resultsmentioning

confidence: 99%

Section: The Second Sub-functionmentioning

confidence: 99%

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The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control

Hertz

Lai

Svensson

et al. 2017

J Sign Process Syst

Self Cite

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“…However, this paper will not consider truncation and rounding since it will reduce the precision. The most costly computation is thus the squaring [6][7] [8] in the Squared Euclidean Distance unit.…”

Section: Hardware Considerationsmentioning

confidence: 99%

Ultra low power hardware for computing Squared Euclidean Distances

Nilsson

Hertz

2011

2011 20th European Conference on Circuit Theory and Design (ECCTD)

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Computing Euclidean Distances is a very important operation in digital communication, especially in the case of trellis coded modulation, where it is used numerously. This paper shows that a substantial reduction in complexity can be achieved in hardware processing elements for computing Euclidean Distances. A reduction in complexity down to 39% is shown compared to traditional designs. The paper also shows that the optimized design can be done completely ripple free, which leads to a reduction of the critical path to far more than half. The reduction in complexity leads to a reduction in power consumption. The ripple free design also leads to lower power consumption for two reasons: the rippling in itself leads to unnecessary glitches, which costs power and the shorter critical path enables a lower supply voltage, which reduces the power consumption as well.

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“…It uses the product of series of sub-functions to approximate the original reciprocal function, and it indicates performance improvement over CORDIC and Newton-Raphson method [9]. Parabolic synthesis method has shown a wide application in arbitrary function, e.g., sine and cosine function [10], [11], logarithmic and exponential function [12], and roots, inverse and inverse roots function [13]. To further release the hardware burden and improve the computing precision of reciprocal, harmonized parabolic synthesis (HPS) [14] and non-linear interpolation [15] have been proposed recently.…”

Section: Introductionmentioning

confidence: 99%

Hardware Efficient Reciprocal Using Second Order Harmonized Parabolic Synthesis and Squaring Shrunk Method

Luo¹,

Luo²,

Yang³

et al. 2018

ElAEE

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In applications as in wireless communication, computer graphics and digital signal processing, a massive of complex matrix operations is often performed. Reciprocal is computed in large quantities in these matrix operations. To obtain high performance, efficient algorithm and hardware architecture are important in terms of low cost, low computation time and high precision. Second order first sub-function and squaring shrunk method have been proposed to build efficient hardware architecture for reciprocal using field programmable gate array. Second order first sub-function in harmonized parabolic synthesis is presented to improve the approximating precision and decrease the memory usage at the cost of additional multipliers. To further reduce the complexity, squaring shrunk method is proposed to decrease the expensive cost of multipliers. The combination of these techniques yields good performance trade-off. Precision simulation and hardware implementation result has shown that hardware reciprocal of high precision, low memory and low multiplier usage has been obtained compared to traditional first order first sub-function harmonized parabolic synthesis method.

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Parabolic synthesis methodology implemented on the sine function

Cited by 14 publications

References 4 publications

The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control

The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control

Ultra low power hardware for computing Squared Euclidean Distances

Hardware Efficient Reciprocal Using Second Order Harmonized Parabolic Synthesis and Squaring Shrunk Method

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