“…Indeed, VHDL or Verilog applications, as well as SystemC applications, are conceptually Discrete Event Systems (DES) [6,7]: in short, upon the occurrence of some events, processes are awaken and some computation produce in turn new events. There is a large body of literature about PDES, their implementation [8,9,10] and their utility for parallel Verilog or VHDL simulation [11,12,13], but they have not yet been introduced for SystemC.…”