Parallel embedded block coding architecture for JPEG 2000

Fang, Hung-Chi; Chang, Yanxun; Wang, Tu-Chih; Lian, Chung-Jr; Chen, Liang-Gee

doi:10.1109/tcsvt.2005.852618

Cited by 36 publications

(1 citation statement)

References 13 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…通过采用JPEG2000 推荐的垂直因果模式(vertical causal mode), Chiang等人 [10,11] 提出了一种通道并行(pass parallel)的位平面编码方法, 实现对同一位平面的 3 个通道编码经由一次扫描完成, 有效减少了处理时间和存储状态信息的存储器规模. 同样地, 采用垂直因果模式, Xu等人 [12] 提出了一种位平面和通道编码双并行的编码技术, Fang等人提出了一种实现字级编码的位平面并行编码方法 [13] 和结构 [14] , 进一步提高了系统的数据处理能力和减少了中间存储器的规模. Fang的方法比较Xu的方法具有更加节省的存储器规模和硬件成本, 以及具有相对简单的控制逻辑和控制电路.…”

unclassified

高性能的字级顺序和并行的位平面编码方法及其结构

熊¹,

田²,

柳³

2008

SSIF

View full text Add to dashboard Cite

unclassified

高性能的字级顺序和并行的位平面编码方法及其结构

熊¹,

田²,

柳³

2008

SSIF

View full text Add to dashboard Cite

Scalable Lossless High Definition Image Coding on Multicore Platforms

Liao

Hung

Tu³

et al.

Embedded and Ubiquitous Computing

View full text Add to dashboard Cite

With the advent of multicores in all processor segments including mobile, embedded, desktop and server ones, we are in the new era of multiplying computing power via scaling the number of cores. The multicore approach is more versatile and programmable than the ASIC approach. For instance, the same multicore product can be adapted to the ever-improving potpourri image processing standards. Developing ASIC modules for each standard would pose million-dollar start-up cost and time-to-market disadvantage. However, the multicore approach is a two-edge sword: Unleashing its multiplying power presents significant programming challenges. The harmony between the multiplying power and programming productivity is the holy grail in this field. This paper addresses the challenge in the Digital Cinema domain. This paper presents an oblivious parallelization paradigm in both compressing and decompressing images via JPEG2000 on multicore platforms with maximum productivity. This approach dramatically reduces compression and decompression time in performing JPEG2000 lossless encoding and decoding algorithms on high definition images in almost real time without any extra hardware acceleration. By boosting parallelism coverage, the high resolution images could be compressed and decompressed in near real time: 15 images decoded/encoded per second. To the best of our knowledge, we are the first to propose a software-based coding solution using commodity multicores to achieve near real-time performance result for JPEG2000. This cost-effective approach could be applied to digital cinema on devices with multicores.

show abstract

High performance word level sequential and parallel coding methods and architectures for bit plane coding

Xiong

Tian

Liu

2008

Sci. China Ser. F-Inf. Sci.

View full text Add to dashboard Cite

This paper introduced a novel high performance algorithm and VLSI architectures for achieving bit plane coding (BPC) in word level sequential and parallel mode. The proposed BPC algorithm adopts the techniques of coding pass prediction and parallel & pipeline to reduce the number of accessing memory and to increase the ability of concurrently processing of the system, where all the coefficient bits of a code block could be coded by only one scan. A new parallel bit plane architecture (PA) was proposed to achieve word-level sequential coding. Moreover, an efficient high-speed architecture (HA) was presented to achieve multi-word parallel coding. Compared to the state of the art, the proposed PA could reduce the hardware cost more efficiently, though the throughput retains one coefficient coded per clock. While the proposed HA could perform coding for 4 coefficients belonging to a stripe column at one intra-clock cycle, so that coding for an N×N code-block could be completed in approximate N 2 /4 intra-clock cycles. Theoretical analysis and experimental results demonstrate that the proposed designs have high throughput rate with good performance in terms of speedup to cost, which can be good alternatives for low power applications. bit plane coding, high performance, word-level sequential, multi-word parallel

show abstract

Parallel embedded block coding architecture for JPEG 2000

Cited by 36 publications

References 13 publications

高性能的字级顺序和并行的位平面编码方法及其结构

高性能的字级顺序和并行的位平面编码方法及其结构

Scalable Lossless High Definition Image Coding on Multicore Platforms

High performance word level sequential and parallel coding methods and architectures for bit plane coding

Contact Info

Product

Resources

About