Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons

Abstract

Today, the problem of designing suitable multiprocessor architecture tailored for a target application field raises the need for a fast and efficient multiprocessor system-on-chip (MPSoC) design environment. Additionally, the implementation of image processing applications on MPSoC system will need to exploit the parallelism and the pipelining in algorithms with the hope of delivering significant reduction in execution times. To take advantage of parallelization on homogeneous MPSoCs and to reduce the programming effort, the proposed design methodology offers more opportunities for accelerating the parallelization of sequential processing image algorithms on pipeline architecture. Our approach provides rapid prototyping tool as a graphic programming environment (CubeGen). Further, it offers a set of parallel software skeletons as a communication library, providing a software abstraction to enable quick implementation of complex image processing applications on field-programmable gate array (FPGA) platform. The design of homogeneous network of communicating processor is presented from the hardware and software specification down to synthesizable hardware description. Then, we extend our approach to support more complex applications by implementing a soft multiprocessor for 'multihypotheses model-driven approach for road recognition' and show the impact of various configuration choices (hardware and software) to match the specific application needs. Using the images of a real road scene, the performance results of the road recognition algorithm on a Xilinx Virtex-6 FPGA platform not only achieve the desired latency but also further improve the tracking performance which depends mainly on the number of hypotheses.

Hardware implementation of machine vision systems: image and video processing

“…The proposed morphology-based visual enhancement system introduces a high degree of user flexibility in addition to meeting real-time constraints capable of obtaining 93 fps for high-definition image resolution. Finally, the last paper contributed in this special issue is entitled 'Parallel embedded processor architecture for FPGA based image processing using parallel software skeletons' [20] authored by Hanen Chenini et al This application belongs to the mid-level vision, the authors provide a rapid prototyping tool as a graphic programming environment (CubeGen). Further, it offers a set of parallel software skeletons as a communication library, providing a software abstraction to enable quick implementation of complex image processing applications on the FPGA platform.…”

Automatic Generation of Custom Parallel Processors for Morphological Image Processing

“…The use of FPGA-based systems for image processing is well established, with several works reported in the literature, such as [18], [6], [12], [10], [11], [4]. However, FPGAs design and programming are still considered a specialized task, typically using Verilog or VHDL synthesis languages [1].…”

A Bottom-up Approach for Visual Object Recognition on FPGA based Embedded Multiprocessor Architecture

“…Based on high level MPSoC-methodology [24], this work presents a solution for rapid prototyping of this kind of algorithm based mainly on two essential concepts. The first concept consists of the derivation of a generic architecture based on a homogeneous pipeline architecture where each stage can start as soon it is finished and new data is available, while maintaining low power consumption with much higher throughput.…”