2016 IEEE 6th International Conference on Advanced Computing (IACC) 2016
DOI: 10.1109/iacc.2016.148
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Parallel Histogram Calculation for FPGA: Histogram Calculation

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Cited by 6 publications
(2 citation statements)
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“…Other architectures with multiple inputs do not mention a specific frequency, so we consider them architecturally. The architecture in [ 26 ] is difficult to run at very high frequency due to the need to connect modules at a long distance, the high fan-out degree, and the complex wiring. The architecture in [ 27 , 28 ] does not really support multiple inputs and outputs at the same time.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…Other architectures with multiple inputs do not mention a specific frequency, so we consider them architecturally. The architecture in [ 26 ] is difficult to run at very high frequency due to the need to connect modules at a long distance, the high fan-out degree, and the complex wiring. The architecture in [ 27 , 28 ] does not really support multiple inputs and outputs at the same time.…”
Section: Methodsmentioning
confidence: 99%
“…For the calculation of HE with multiple inputs and outputs, both of the above architectures have their corresponding variants. Multi-input and -output architectures, such as the multi-decoder architecture, are the first kind [ 26 ]. In this artchitecture, multiple pixels are input to multiple decoders, and the output of the same bit from different decoders is input to the same computing unit.…”
Section: Related Workmentioning
confidence: 99%