Parallel in/out systolic AB ² architecture with low complexity in GF (2 ^m )

Abstract

Efficient GF(2 m ) arithmetic clearly affects the performance of compute-intensive applications. A new low-complexity parallel-in/ out systolic AB 2 multiplier based on the least significant bit-first scheme is presented. Compared with related works, the scheme yields significantly lower area-time complexity.Introduction: Finite fields GF(2 m ) have taken a keen interest owing to their useful applications in coding theory, cryptography, and signal processing [1, 2]. Among GF(2 m ) operations, time-consuming inversion and exponentiation can be computed efficiently by a sequence ofwhere only m − 1 AB 2 -type multiplications are performed recursively. However, if general multiplication is used instead, m − 1 multiplications and m − 1 squarings are needed in the worst case. Some effort have been made on efficient realisation of AB 2 [3-5]. Systolic designs provide area-time (AT) efficient implementation due to modularity and regularity of their structures. Wei [3] proposed a systolic AB 2 with two-way data flow, whereas Wang-Guo [4] and Kim-Lee [5] proposed a systolic AB 2 with one-way data flow. Although several systolic AB 2 have been proposed, their high area and time complexities are crucial constraints. Thus, further study for efficient AB 2 architecture with low complexity is required. In this Letter, a new low-complexity parallel in/out systolic AB 2 architecture in GF(2 m ) is presented, which is on the basis of least significant bit (LSB)-first method. It can be utilised as a major component for both inversion and exponentiation.