Parallel Sampling-Pipeline for Indefinite Stream of Heterogeneous Graphs using OpenCL for FPGAs

Tariq, Muhammad Usman; Saeed, Fahad

doi:10.1109/bigdata.2018.8621979

Cited by 3 publications

(2 citation statements)

References 30 publications

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“…Operator SP [16,17,21,65,75,87,114,115,146]; BFS [47,76,123,126]; MM [12]; PR [147]; Cent. [53] XML Parser [35,59,108]; Filter [27]; XPath [42,88,89]; Twig [90] Insert [78]; Hash [80] Binary representation HP [148]; VP [28]; IS [33]; CSR [7]; HWM [60,86]; Other [110,116,127,128,135] Hash table [18,61,121,140]; Socket [124]; Near-data [120];…”

Section: Graph Document Key-value Nrds -Functionalmentioning

confidence: 99%

“…The graph is compressed and streamed which results in a high effective bandwidth. When the application permits graph sampling, the data volume and irregular memory access can be tamed with a data structure derived from CSR [116]. The novel data structure allows storing multiple graphs and removal of vertices and edges with a second pointer array.…”

Section: Memory Accessmentioning

confidence: 99%

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Non-Relational Databases on FPGAs: Survey, Design Decisions, Challenges

Dann¹,

Ritter²,

Fröning³

2020

Preprint

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Non-relational database systems (NRDS), such as graph, document, key-value, and wide-column, have gained much attention in various trending (business) application domains like smart logistics, social network analysis, and medical applications, due to their data model variety and scalability. The broad data variety and sheer size of datasets pose unique challenges for the system design and runtime (incl. power consumption). While CPU performance scaling becomes increasingly more difficult, we argue that NRDS can benefit from adding field programmable gate arrays (FPGAs) as accelerators. However, FPGA-accelerated NRDS have not been systematically studied, yet.To facilitate understanding of this emerging domain, we explore the fit of FPGA acceleration for NRDS with a focus on data model variety. We define the term NRDS class as a group of non-relational database systems supporting the same data model. This survey describes and categorizes the inherent differences and nontrivial trade-offs of relevant NRDS classes as well as their commonalities in the context of common design decisions when building such a system with FPGAs. For example, we found in the literature that for keyvalue stores the FPGA should be placed into the system as a smart network interface card (SmartNIC) to benefit from direct access of the FPGA to the network. However, more complex data models and processing of other classes (e. g., graph and document) commonly require more elaborate near-data or socket accelerator placements where the FPGA respectively has the only

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Section: Graph Document Key-value Nrds -Functionalmentioning

confidence: 99%

Section: Memory Accessmentioning

confidence: 99%

Non-Relational Databases on FPGAs: Survey, Design Decisions, Challenges

Dann¹,

Ritter²,

Fröning³

2020

Preprint

View full text Add to dashboard Cite

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Tydi-Chisel: Collaborative and Interface-Driven Data-Streaming Accelerators

Cromjongh,

Tian,

Hofstee

et al. 2023

2023 IEEE Nordic Circuits and Systems Conference (NorCAS)

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In spite of progress on hardware design languages, the design of high-performance hardware accelerators forces many design decisions specializing the interfaces of these accelerators in ways that complicate the understanding of the design and hinder modularity and collaboration. In response to this challenge, Tydi is presented as an open specification for streaming dataflow designs in digital circuits, allowing designers to express how composite and variable-length data structures are transferred over streams using clear, data-centric types. In contrast, Chisel, with its high level of abstraction and customizability offers a suitable platform to implement Tydi-based components. In this paper, Tydi-Chisel is presented along with an A-to-Z designprocess description. Tydi-Chisel aims to simplify the design of data-streaming accelerators through the integration of the Tydi interface standard in Chisel, along with helper components and syntax sugar. In combination Chisel and Tydi help bridge the hardware-software divide, making solo-design and collaboration between designers easier.

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