2008
DOI: 10.1117/1.2898632
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Parallel-shift register and binary multiplier using optical hardware components

Abstract: An optical four-bit parallel-shift register that consists of four serially connected optical flip-flop memories is driven by common clock pulses. Each optical flip-flop consists of two coupled polarization switches that share an all-optical demultiplexer, which makes the optical flip-flops easily connected with each other to form a parallel-shift register. The optical flip-flops are controlled by clock pulses. The parallel-shift register and an optical parallel adder are used to demonstrate an alloptical binar… Show more

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Cited by 7 publications
(6 citation statements)
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“…Inputs A and B gets combined into a single beam. The transmitted intensity is defined as the O1 output and the reflected value as the output O2 [11,12]. We bias the hardlimiter at a=2.…”
Section: All Optical and And Xor Gate Using Hardlimitersmentioning
confidence: 99%
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“…Inputs A and B gets combined into a single beam. The transmitted intensity is defined as the O1 output and the reflected value as the output O2 [11,12]. We bias the hardlimiter at a=2.…”
Section: All Optical and And Xor Gate Using Hardlimitersmentioning
confidence: 99%
“…The structure of the all-optical flip-flop memory is depicted in Figureure 4 as designed in reference [11]. It consists of two coupled polarization switches (PSWs).…”
Section: All Optical D Flip-flopmentioning
confidence: 99%
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“…The emergence of increasingly high speed and the number of users in optical communication systems demands the OVSF codes technique in the optical communication links. The performing of signal processing operations entirely within the optical domain would exploit the speed and parallelism inherent to optics [2].…”
Section: Introductionmentioning
confidence: 99%