Parallel Shortest Lattice Vector Enumeration on Graphics Cards

Hermans, Jens; Schneider, Michael; Buchmann, Johannes; Vercauteren, Fréderik; Preneel, Bart

doi:10.1007/978-3-642-12678-9_4

Cited by 26 publications

(24 citation statements)

References 48 publications

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“…The parallelization of Enum has been investigated in [37] and [16]. In the latter, the authors use the Gaussian heuristic to balance the sizes of the sub-tasks sent to the slave machines.…”

Section: Practical Improvementsmentioning

confidence: 99%

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Algorithms for the Shortest and Closest Lattice Vector Problems

Hanrot

Pujol

Stehlé

2011

Lecture Notes in Computer Science

101

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Abstract. We present the state of the art solvers of the Shortest and Closest Lattice Vector Problems in the Euclidean norm. We recall the three main families of algorithms for these problems, namely the algorithm by Micciancio and Voulgaris based on the Voronoi cell [STOC'10], the Monte-Carlo algorithms derived from the Ajtai, Kumar and Sivakumar algorithm [STOC'01] and the enumeration algorithms originally elaborated by Kannan [STOC'83] and Fincke and Pohst [EUROCAL'83]. We concentrate on the theoretical worst-case complexity bounds, but also consider some practical facets of these algorithms.

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“…The parallelization of Enum has been investigated in [37] and [16]. In the latter, the authors use the Gaussian heuristic to balance the sizes of the sub-tasks sent to the slave machines.…”

Section: Practical Improvementsmentioning

confidence: 99%

“…However, the heuristic implementations of the enumeration families, relying on tree pruning strategies [75,76,80,25] seem to outperform the heuristic implementations of the saturation families [65,58]. This observation has led to hardware implementations of the enumeration [37,16].…”

Section: Introductionmentioning

confidence: 99%

Algorithms for the Shortest and Closest Lattice Vector Problems

Hanrot

Pujol

Stehlé

2011

Lecture Notes in Computer Science

101

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“…In cryptanalysis, Bernstein et al use parallelization techniques on graphics cards to solve integer factorization using elliptic curves [3]. Concerning lattices and lattice reduction, there is an implementation of the ENUM algorithm on graphics cards [15]. We are not aware of other work in the field of lattice reduction.…”

Section: Gpu Computationmentioning

confidence: 99%

“…There are approaches of parallelizing LLL in the SIMD model, e.g. [30,2] and also for enumeration [9,15,10]. The combination of both however has not yet been tried.…”

Section: Introductionmentioning

confidence: 99%

Random Sampling for Short Lattice Vectors on Graphics Cards

Schneider

Göttert

2011

Cryptographic Hardware and Embedded Systems – CHES 2011

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Abstract. We present a GPU implementation of the Simple Sampling Reduction (SSR) algorithm that searches for short vectors in lattices. SSR makes use of the famous BKZ algorithm. It complements an exhaustive search in a suitable search region to insert random, short vectors to the lattice basis. The sampling of short vectors can be executed in parallel.Our GPU implementation increases the number of sampled vectors per second from 5200 to more than 120, 000. With this we are the first to present a parallel implementation of SSR and we make use of the computing capability of modern graphics cards to enhance the search for short vectors even more.

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“…Related works. Recently, Hermans et al [20] described a parallel version of KFP and implemented it on GPUs. According to their benchmarks, an Nvidia GeForce GTX 280 GPU yields a 5-fold acceleration against a single core of an Intel Core 2 Extreme QX9650 at 3 GHz which processes 1.25 · 10 7 nodes per second.…”

Section: Introductionmentioning

confidence: 99%

Accelerating Lattice Reduction with FPGAs

Detrey

Hanrot

Pujol

et al. 2010

Lecture Notes in Computer Science

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Abstract. We describe an FPGA accelerator for the Kannan-FinckePohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementation of KFP specifically targeting cryptographically relevant dimensions. In order to optimize this implementation, we theoretically and experimentally study several facets of KFP, including its efficient parallelization and its underlying arithmetic. Our FPGA accelerator can be used for both solving stand-alone instances of SVP (within a hybrid CPU-FPGA compound) or myriads of smaller dimensional SVP instances arising in a BKZ-type algorithm. For devices of comparable costs, our FPGA implementation is faster than a multi-core CPU implementation by a factor around 2.12.

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Parallel Shortest Lattice Vector Enumeration on Graphics Cards

Cited by 26 publications

References 48 publications

Algorithms for the Shortest and Closest Lattice Vector Problems

Algorithms for the Shortest and Closest Lattice Vector Problems

Random Sampling for Short Lattice Vectors on Graphics Cards

Accelerating Lattice Reduction with FPGAs

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