Parallel synaptic design of ferroelectric tunnel junctions for neuromorphic computing

Moon, Taehwan; Lee, Hyun Jae; Nam, Seung‐Geol; Bae, Hagyoul; Choe, Duk‐Hyun; Jo, Sanghyun; Lee, Yunseong; Park, Yoonsang; Yang, J. Joshua; Heo, Jinseong

doi:10.1088/2634-4386/accc51

Cited by 5 publications

(1 citation statement)

References 42 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Moon et al [3] presented an effective method to address another technical challenge for resistive memory-based neuromorphic circuits, namely, the nonlinear weight updates. By using multiple ferroelectric tunnel junctions in parallel as a single synapse, the variability in the weight update is averaged out, resulting in the lowest reported cycle-to-cycle and device-to-device variabilities across multiple dies in an 8 inch wafer.…”

mentioning

confidence: 99%

Editorial: Focus issue on in-memory computing

Lu,

Payvand,

Yang

2024

Neuromorph. Comput. Eng.

View full text Add to dashboard Cite

mentioning

confidence: 99%

Editorial: Focus issue on in-memory computing

Lu,

Payvand,

Yang

2024

Neuromorph. Comput. Eng.

View full text Add to dashboard Cite

Review of Ferroelectric Materials and Devices toward Ultralow Voltage Operation

Wang,

Chen,

Yun

et al. 2025

Adv Funct Materials

View full text Add to dashboard Cite

Ferroelectrics are considered to be promising candidates for highly energy‐efficient electronic devices in future information technologies owing to their nonvolatile and low‐energy operation of spontaneous electric polarization. Driven by the pervasive and growing demands for miniaturization and energy efficiency in nanoelectronics, further reductions in the operating voltage of ferroelectric‐based devices are dispensable and thus have received immense attentions. Recent remarkable advances in atomic‐scale synthesis, cutting‐edge characterizations, and multiscale theoretical calculations of ferroelectrics have gained unprecedented insights into the manipulation of emergent functionalities in multiple length scales, which helps the discovery of nontrivial polar structures and designs of device architectures toward the promise of ultralow‐power consumption. Here, state‐of‐the‐art strategies for reducing operating voltage in ferroelectric materials and devices are reviewed. This article starts with a brief introduction and major achievements in ferroelectrics, and expounds on the techniques to probe the polarization‐switching process. Moreover, this article focuses predominantly on recent advancements in achieving low operating voltages through various prevalent strategies such as thickness scaling, defect engineering, chemical doping, surface and interfacial design, strain engineering. Finally, perspectives with scientific and technical challenges are discussed, aiming to facilitate the energy‐efficient applications of ferroelectric materials and devices in future information technologies.

show abstract