International Workshop on Systems, Signal Processing and Their Applications, WOSSPA 2011
DOI: 10.1109/wosspa.2011.5931443
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Parameterized FPGA-based architecture for parallel 1-D filtering algorithms

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Cited by 13 publications
(6 citation statements)
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“…In this paper, the authors have been presented a new SOA architecture proposal that comes from business analysis to SOA architectural design. The future work of this research is to implement the developed SOA in ASIC or FPGA hardware [11][12][13][14][15][16] for modern implications.…”
Section: Discussionmentioning
confidence: 99%
“…In this paper, the authors have been presented a new SOA architecture proposal that comes from business analysis to SOA architectural design. The future work of this research is to implement the developed SOA in ASIC or FPGA hardware [11][12][13][14][15][16] for modern implications.…”
Section: Discussionmentioning
confidence: 99%
“…The future enhancement of the system is by developing the security system of this work and implementing the developed system in ASIC or reconfigurable hardware [15][16][17][18][19][20]…”
Section: Future Workmentioning
confidence: 99%
“…The future work is to implement the developed adaptive controller in a reconfigurable hardware [10][11][12][13][14] as a parallel architecture that may replace complecated and advanced control system applications [15][16][17].…”
Section: Future Workmentioning
confidence: 99%