Parameterized IP Infrastructures for fault-tolerant FPGA-based systems: Development, assessment, case-study

Kulanov, Vitaliy; Kharchenko, Vyacheslav; Perepelitsyn, Artem

doi:10.1109/ewdts.2010.5742075

Cited by 4 publications

(1 citation statement)

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“…FPGA allows to construct digital devices with high-level hardware description languages, which reduces the complexity of the development and allows the reuse the code through the use of IP-cores [20].…”

Section: Computer Sciences and Mathematicsmentioning

confidence: 99%

Development of the Search Method for Non-Linear Shift Registers Using Hardware, Implemented on Field Programmable Gate Arrays

Poluyanenko

2017

EUREKA: Physics and Engineering

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The nonlinear feedback shift registers of the second order inare considered, because based on them it can be developed a generator of stream ciphers with enhanced cryptographic strength. Feasibility of nonlinear feedback shift register search is analyzed. These registers form a maximal length sequence, using programmable logic devices. Performance evaluation of programmable logic devices in the generation of pseudo-random sequence by nonlinear feedback shift registers is given. Recommendations to increase this performance are given. The dependence of the maximum generation rate (clock frequency), programmable logic devices on the number of concurrent nonlinear registers is analyzed. A comparison of the generation rate of the sequences that are generated by nonlinear feedback shift registers is done using hardware and software. The author suggests, describes and explores the search method of nonlinear feedback shift registers, generating a sequence with a maximum period. As the main result are found non-linear 26, 27, 28 and 29 degrees polynomials.

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Section: Computer Sciences and Mathematicsmentioning

confidence: 99%