Parasitic effects of air-gap through-silicon vias in high-speed three-dimensional integrated circuits

Abstract

In this paper, ground-signal-ground type through-silicon vias (TSVs) exploiting air gaps as insulation layers are designed, analyzed and simulated for applications in millimeter wave. The compact wideband equivalent-circuit model and passive elements (RLGC) parameters based on the physical parameters are presented with the frequency up to 100 GHz. The parasitic capacitance of TSVs can be approximated as the dielectric capacitance of air gaps when the thickness of air gaps is greater than 0.75 µm. Therefore, the applied voltage of TSVs only needs to achieve the flatband voltage, and there is no need to indicate the threshold voltage. This is due to the small permittivity of air gaps. The proposed model shows good agreement with the simulation results of ADS and Ansoft's HFSS over a wide frequency range.

Closed-form internal impedance model and characterization of mixed carbon nanotube bundles for three-dimensional integrated circuits*

“…[9] Three-dimensional integrated circuits (3-D ICs) can dramatically enhance chip performance, functionality, and device packing density by stacking multiple layers of active devices vertically. [10,11] Through-silicon vias (TSVs) are essentially cylindrical conducting vias coated with a layer of insulating material residing in silicon substrates for vertical interconnects in 3-D ICs. [12] Recently, TSV arrays filled with CNT bundles were fabricated successfully for 3-D ICs using various methods.…”