Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux

Abstract

Dynamically reconfigurable hardware allows for implementing systems that can be adapted at run-time according to the needs of the user. This paper presents an architecture that is composed of multiple FPGAs that are connected to an embedded processor. Thus, the architecture is referred to as a Multi-FPGA Clustered Architecture (MFCA). All FPGAs can be partially and dynamically reconfigured to integrate user-defined IP-Cores into the system at run-time. For the resource management and communication management we have implemented a Linux Operating System on the embedded processor that can be used to control the reconfiguration of the FPGAs by means of simple function calls. Furthermore, the Linux OS completely hides the physical infrastructure of the MFCA from user applications, offering a consistent interface to utilize partial reconfiguration. 1

FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators

“…Finally, as mentioned earlier, several recent projects looked into effective scheduling algorithms for managing reconfigurable computing resources, where HW accelerators are dynamically instantiated on the FPGA [10] [11] [12] [13]. We view the work presented in this paper as complementary to these projects.…”

“…Additionally, extensive research has been conducted on effective scheduling algorithms for managing HW tasks on computing resources [10] [11] [12] [13]. In particular, the MOLEN/SESAME project [12] [13] uses profiling information to decide whether to schedule tasks to run in SW or HW.…”

“…al. [10] introduced a run-time environment that is able to dynamically place and/or remove HW tasks on demand. They use online partial bitstream manipulation for proper placement of tasks on a multi-FPGA system.…”

“…All the necessary OS support for reconfigurable computing systems using DPR (e.g. [10]) currently exists in FUSE.…”

Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign

“…All these software applications are compiled for the processor of the target system. The compiled software is then integrated, in the Software Integration phase, with the bootloader, with the Linux OS and with the Linux Reconfiguration Support [52,53], that extends a standard OS with the capability of both performing reconfigurations of the reprogrammable device and managing the reconfigurable hardware as well as the static hardware, in order to allow runtime plug-in of components. The following step is the Bitstreams Generation which is necessary to obtain the bitstreams that will be used to configure and to partially reconfigure the reprogrammable device.…”