Partial order based approach to synthesis of speed-independent circuits

Abstract

This paper introduces a novel

Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings

“…One such possible way was suggested in [18], within a general framework for synthesis of speed-independent circuits from unfoldings. It was based on the idea of finding approximated boolean covers for instances of places and transitions [15].…”

“…The second approach avoids construction of the full reachable state space; it includes techniques either based on structural analysis of STGs [15] or use of PN unfoldings [10,18]. The structural method of [15] has given rise to the idea of an approximation-based synthesis of the logic implementation of an STG.…”

“…Albeit efficient in many practical cases, it is restricted to only handling a sub-class of PNs -free-choice nets [3]. The attempt to generalise it within the framework of unfolding presented in [18] has proved to be quite promising in dealing with large STG models.…”

“…The main shortcoming of the method of [18], however, was that its approximation and refinement strategy was fairly straightforward and could not work well with the Don't care state sets, i.e. sets of states which would have been unreachable if the exact reachability analysis was applied.…”

“…In particular, if two approximation cubes were intersecting on the unreachable states, the only way to confront this problem was to construct the corresponding states to see whether this intersection was dangerous or not. The construction (or refinement) procedure suggested in [18] was inefficient and caused an explosion in the number of cubes obtained during the refinement.…”