Pattern matching in OpenCL

Aragon, Elena; Jiménez, Juan Manuel Bautista; Maghazeh, Arian; Rasmusson, Jim; Bordoloi, Unmesh D.

doi:10.1145/2664666.2664671

Cited by 8 publications

(8 citation statements)

References 9 publications

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“…As expected, using local memory to store the filters had a negative effect on performance, because the local memory in the Mali GPU is simulated by global memory. Moreover, this simulation seems to come at a cost in that the local memory is more expensive than the global memory with the same overall settings (which was also observed by Aragon et al [4]). Surprisingly, using texture memory did not have a beneficial effect on performance either.…”

Section: Deciding Parameters For Dfcsupporting

confidence: 60%

“…In this section, we discuss optimizations that are relevant to explore and relate to (i) features of the architecture and (ii) possibilities for the evaluated algorithms to make good use of those features. A similar discussion on some of these parameters can also be found in the work by Aragon et al [4]. We extend their discussion with more parameters to also consider the use of texture memory for storing the relevant data structures, as well as the use of vectorization, as it has shown promise for CPU-based algorithms [37].…”

Section: Relevant Algorithm Optimizationsmentioning

confidence: 65%

“…One reason that makes PFAC an interesting algorithm to include in this benchmark is the fact that it has been evaluated on resourceconstrained embedded GPUs, similar to the ones we target in this paper. Aragon et al [4] implement PFAC in OpenCL and evaluate it on an ARM Mali GPU, considering various optimizations. In this work, we build upon this evaluation and extend it with more algorithms and insights.…”

Section: State Machine Based Algorithmsmentioning

confidence: 99%

“…It is important to understand how the characteristics of the target platform affect the performance of the algorithms and allow for different optimizations. This analysis has been done already for PFAC by Aragon et al [4], but not for DFC since we are the first to implement a GPU version of it. Therefore, we follow the approach of Aragon et al and we present, in Table 3, the effects of the optimizations discussed in Section 4 on DFC's performance.…”

Section: Deciding Parameters For Dfcmentioning

confidence: 99%

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Co-evaluation of pattern matching algorithms on IoT devices with embedded GPUs

Stylianopoulos

Kindström

Almgren

et al. 2019

Proceedings of the 35th Annual Computer Security Applications Conference

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Pattern matching is an important building block for many security applications, including Network Intrusion Detection Systems (NIDS). As NIDS grow in functionality and complexity, the time overhead and energy consumption of pattern matching become a significant consideration that limits the deployability of such systems, especially on resource-constrained devices. On the other hand, the emergence of new computing platforms, such as embedded devices with integrated, general-purpose Graphics Processing Units (GPUs), brings new, interesting challenges and opportunities for algorithm design in this setting: how to make use of new architectural features and how to evaluate their effect on algorithm performance. Up to now, work that focuses on pattern matching for such platforms has been limited to specific algorithms in isolation.In this work, we present a systematic and comprehensive benchmark that allows us to co-evaluate both existing and new pattern matching algorithms on heterogeneous devices equipped with embedded GPUs, suitable for medium-to high-level IoT deployments. We evaluate the algorithms on such a heterogeneous device, in close connection with the architectural features of the platform and provide insights on how these features affect the algorithms' behavior. We find that, in our target embedded platform, GPU-based pattern matching algorithms have competitive performance compared to the CPU and consume half as much energy as the CPU-based variants. Based on these insights, we also propose HYBRID, a new pattern matching approach that efficiently combines techniques from existing approaches and outperforms them by 1.4x, across a range of realistic and synthetic data sets. Our benchmark details the effect of various optimizations, thus providing a path forward

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Section: Deciding Parameters For Dfcsupporting

confidence: 60%

Section: Relevant Algorithm Optimizationsmentioning

confidence: 65%

Section: State Machine Based Algorithmsmentioning

confidence: 99%

Section: Deciding Parameters For Dfcmentioning

confidence: 99%

See 2 more Smart Citations

Co-evaluation of pattern matching algorithms on IoT devices with embedded GPUs

Stylianopoulos

Kindström

Almgren

et al. 2019

Proceedings of the 35th Annual Computer Security Applications Conference

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“…Bellekens et al [42] compress the size of Aho-Corasick's state machine to reduce the communication cost between the CPU and the GPU. Aragon et al [43] experiment with pattern matching on embedded GPUs that share the same physical memory as the CPU. Kouzinopoulos and Margaritis also experiment with pattern matching algorithms on GPUs and apply them on genome sequence analysis [39].…”

Section: Other Architecturesmentioning

confidence: 99%

Multiple pattern matching for network security applications: Acceleration through vectorization

Stylianopoulos

Almgren

Papatriantafilou

2020

Journal of Parallel and Distributed Computing

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As both new network attacks emerge and network traffic increases in volume, the need to perform network traffic inspection at high rates is ever increasing. The core of many security applications that inspect network traffic (such as Network Intrusion Detection) is pattern matching. At the same time, pattern matching is a major performance bottleneck for those applications: indeed, it is shown to contribute to more than 70% of the total running time of Intrusion Detection Systems. Although numerous efficient approaches to this problem have been proposed on custom hardware, it is challenging for pattern matching algorithms to gain benefit from the advances in commodity hardware. This becomes even more relevant with the adoption of Network Function Virtualization, that moves network services, such as Network Intrusion Detection, to the cloud where scaling on commodity hardware is key for performance. In this paper, we tackle the problem of pattern matching and show how to leverage the architecture features found in commodity platforms. We present efficient algorithmic designs that achieve good cache locality and make use of modern vectorization techniques to utilize data parallelism within each core. We first identify properties of pattern matching that make it fit for vector-$ Preliminary results of this work were presented the 46th International Conference on Parallel Processing (ICPP) 2017 [1].

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