Phase Change Memory 2017
DOI: 10.1007/978-3-319-69053-7_5
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PCM Main Reliability Features

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Cited by 2 publications
(1 citation statement)
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“…Although PCM shows excellent endurance characteristics for over 10 8 cycles, cycling‐induced degradation can generate early tail‐bits that trigger read errors, thereby limiting overall endurance. Three typical tail‐bit behaviors are observed: cell‐open, stuck‐high (SET failure), and stuck‐low (RESET failure) . To avoid such fails and soft fails of write operation, an efficient ECC would be helpful for higher reliability.…”
Section: Architecture and Optimized Designsmentioning
confidence: 99%
“…Although PCM shows excellent endurance characteristics for over 10 8 cycles, cycling‐induced degradation can generate early tail‐bits that trigger read errors, thereby limiting overall endurance. Three typical tail‐bit behaviors are observed: cell‐open, stuck‐high (SET failure), and stuck‐low (RESET failure) . To avoid such fails and soft fails of write operation, an efficient ECC would be helpful for higher reliability.…”
Section: Architecture and Optimized Designsmentioning
confidence: 99%