Peak Temperature Minimization for Hard Real-Time Systems Using DVS and DPM

Abstract

With the increasing power densities, managing the on-chip temperature has become an important design challenge, especially for hard real-time systems. This paper addresses the problem of minimizing the peak temperature under hard real-time constraints using a combination of dynamic voltage scaling and dynamic power management. We derive a closed-form formulation for the peak temperature and provide a genetic-algorithm-based approach to solve the problem. Our approach is evaluated with both simulations and real measurements with an Intel i5 processor. The evaluation results demonstrate the effectiveness of the proposed approach compared to related works in the literature.

Accurate On-Chip Thermal Peak Detection Based on Heuristic Algorithms and Embedded Temperature Sensors

“…To allow efficient DTM, peak detection must be accurate, as any underestimation of the acquired temperature could cause late triggering of the DTM, which could lead to early system failure [12,13]. The two most popular ways to determine the runtime temperature are through dynamic insertion of thermal sensors in a reconfigurable chip [14] and the physical embedding of on-chip sensors [15].…”

A Group-Based Energy-Efficient Dual Priority Scheduling for Real-Time Embedded Systems

“…At present, the energy optimized technology for embedded systems is at different levels, including the circuit level, system level, storage level, and compile level [9]. At the system level, there are two primary energy-efficient approaches to address the energy consumption optimization: dynamic voltage and frequency scaling (DVFS) [10][11][12] and dynamic power management (DPM) [13,14]. These approaches are mainly the combination of task scheduling, DVFS, and DPM.…”