Performance analysis of silicon nanowire transistors considering effective oxide thickness of high-k gate dielectric

Abstract

We have analyzed the effective oxide thickness (EOT) of the dielectric material for which we have optimum performance and the output characteristics of the silicon nanowire transistors by replacing the traditional SiO2 gate insulator with a material that has a much higher dielectric constant (high-k) gate, materials like Si3N4, Al2O3, Y2O3 and HfO2. We have also analyzed the channel conductance, the effect of a change in thickness, the average velocity of the charge carrier and the conductance efficiency in order to study the performance of silicon nanowire transistors in the nanometer region. The analysis was performed using the Fettoy, a numerical simulator for ballistic nanowire transistors using a simple top of the barrier (Natori) approach, which is composed of several matlab scripts. Our results show that hafnium oxide (HfO2) gate insulator material provides good thermal stability, a high recrystallization temperature and better interface qualities when compared with other gate insulator materials; also the effective oxide thickness of HfO2 is found to be 0.4 nm.

Silicon Nanowires: Fabrication and Applications

“…Therefore, it is natural to also use silicon dioxide in silicon nanowire devices and indeed it can deliver excellent properties [52]. However, also here the higher k value of materials like hafnium dioxide (HfO 2 ), which is established in CMOS technologies today, is of benefit [53]. Atomic layer deposition (ALD) is the technique best suited to deposit dielectrics on nanowires since it can form conformal films on arbitrary geometries.…”

A 2-D semi-analytical model of double-gate tunnel field-effect transistor

“…1/ m /= " si m 3 3 . The coefficient A 0 m can be calculated by substituting L 1 into L in Equation (8). Then by combining Equation ( 9) with the potential in region C2, i.e., U C2 .x; t 0 / D V ds C .kT =q/ ln .N d =n i / L 1 6 x 6 L, and setting y D t 0 in Equation ( 9), the surface potential in region C can be obtained in the linear state.…”

TCAD performance analysis of high-K dielectrics for gate all around InAs nanowire transistor considering scaling of gate dielectric thickness

“…The primary goal of this paper is to study the performance of InAs based GAA nanowire transistor with different high-k materials. Hafnium oxide (HfO 2 ) gate dielectric material can provide good thermal stability, high re-crystallization temperature and better interface qualities in comparison to other gate insulator materials; also the effective oxide thickness of HfO 2 is found to be 0.4 nm [2]. In addition, Hafnium oxide based materials such as, HfSi X O Y , HfO X N Y , HfSi X O Y N Z (K HfO2~2 5) have emerged as leading candidates to replace SiO 2 gate insulators in advanced CMOS applications [3].…”