Performance and energy efficiency analysis of 64-bit ARM using GAMESS

Tiwari, Ananta; Keipert, Kristopher; Jundt, Adam; Peraza, Joshua; Leang, Sarom S.; Laurenzano, Michael A.; Gordon, Mark S.; Carrington, Laura

doi:10.1145/2834899.2834905

Cited by 13 publications

(8 citation statements)

References 25 publications

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“…The BNCH bin, which consists of counters that describe interaction of applications with the branch unit, ranks in the top three in both architectures. To understand why the branch unit is a bottleneck, we created a benchmark, similar to one created in [31], that loops around a branch which is controlled by an array of booleans. We initialize the size of the array to 32K booleans, and run the benchmark inside another loop 16K times.…”

Section: Performance Resultsmentioning

confidence: 99%

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Compute bottlenecks on the new 64-bit ARM

Jundt

Cauble-Chantrenne

Tiwari

et al. 2015

Proceedings of the 3rd International Workshop on Energy Efficient Supercomputing

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The trifecta of power, performance and programmability has spurred significant interest in the 64-bit ARMv8 platform. These new systems provide energy efficiency, a traditional CPU programming model, and the potential of high performance when enough cores are thrown at the problem. However, it remains unclear how well the ARM architecture will work as a design point for the High Performance Computing market. In this paper, we characterize and investigate the key architectural factors that impact power and performance on a current ARMv8 offering (X-Gene 1) and Intel's Sandy Bridge processor. Using Principal Component Analysis, multiple linear regression models, and variable importance analysis we conclude that the CPU frontend has the biggest impact on performance on both the X-Gene and Sandy Bridge processors.

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Section: Performance Resultsmentioning

confidence: 99%

“…Given the recent attention of ARM in the server and scientific communities, there has been a growth in research on ARM's power and performance capabilities [16,26,27,28,29,31].…”

Section: Related Workmentioning

confidence: 99%

Compute bottlenecks on the new 64-bit ARM

Jundt

Cauble-Chantrenne

Tiwari

et al. 2015

Proceedings of the 3rd International Workshop on Energy Efficient Supercomputing

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“…Where possible the results from LMBench were confirmed using published specifications. Core and system memory and floating point throughput were measured using the CS Roofline Toolkit was used [13]. Measurements were taken for all cores and a single core across all systems to allow for comparison across the various architecture implementations.…”

Section: Methodsmentioning

confidence: 99%

Preliminary Investigation of Mobile System Features Potentially Relevant to HPC

Pruitt

Freudenthal

2016

2016 4th International Workshop on Energy Efficient Supercomputing (E2SC)

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Energy consumption's increasing importance in scientific computing has driven an interest in developing energy efficient high performance systems. Energy constraints of mobile computing has motivated the design and evolution of low-power computing systems capable of supporting a variety of compute-intensive user interfaces and applications. Others have observed the evolution of mobile devices to also provide high performance [14]. Their work has primarily examined the performance and efficiency of compute-intensive scientific programs executed either on mobile systems or hybrids of mobile CPUs grafted into non-mobile (sometimes HPC) systems [6,12,14].This report describes an investigation of performance and energy consumption of a single scientific code on five high performance and mobile systems with the objective of identifying the performance and energy efficiency implications of a variety of architectural features. The results of this pilot study suggest that ISA is less significant than other specific aspects of system architecture in achieving high performance at high efficiency. The strategy employed in this study may be extended to other scientific applications with a variety of memory access, computation, and communication properties.

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“…This was subsequently used by Cavium in their ThunderX product that can be configured with a 48core ARMv8 processor. Some early quantum chemistry related performance results for this system were somewhat disappointing, indicating that this system is behind the performance of contemporary x86 processors. , …”

Section: Emerging Hardware Trendsmentioning

confidence: 99%

Novel Computer Architectures and Quantum Chemistry

et al. 2020

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Electronic structure theory (especially quantum chemistry) has thrived and has become increasingly relevant to a broad spectrum of scientific endeavors as the sophistication of both computer architectures and software engineering has advanced. This article provides a brief history of advances in both hardware and software, from the early days of IBM mainframes to the current emphasis on accelerators and modern programming practices.

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Performance and energy efficiency analysis of 64-bit ARM using GAMESS

Cited by 13 publications

References 25 publications

Compute bottlenecks on the new 64-bit ARM

Compute bottlenecks on the new 64-bit ARM

Preliminary Investigation of Mobile System Features Potentially Relevant to HPC

Novel Computer Architectures and Quantum Chemistry

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