Performance and energy models for memristor-based 1T1R RRAM cell

Zangeneh, Mahmoud; Joshi, Ajay

doi:10.1145/2206781.2206786

Cited by 19 publications

(6 citation statements)

References 10 publications

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“…1C). We used two individual chips, each contains 128 × 64 memristive crossbar arrays in a one-transistor one-resistance switch (1T1R) architecture (25)(26)(27), in this study to implement the VMM operations in the two layers (Fig. 1C).…”

Section: Design and Construction Of The Hardwarementioning

confidence: 99%

A fully hardware-based memristive multilayer neural network

et al. 2021

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Section: Design and Construction Of The Hardwarementioning

confidence: 99%

A fully hardware-based memristive multilayer neural network

et al. 2021

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“…1T1R-RRAM consists of an access transistor and a resistor as a storage element. Zangeneh and Joshi have also mentioned that the 1T1R cell structure is similar to that of a DRAM cell in that the data is stored as the resistance of the resistor and the transistor serves as an access switch for reading and writing data [ 177 , 178 ]. In reference to this, they revealed the 1T1R cell as the basic building block of a NVRRAM array as it avoids sneak path problem to ensure reliable operation.…”

Section: Reviewmentioning

confidence: 99%

Overview of emerging nonvolatile memory technologies

et al. 2014

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Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

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“…The inputs of the Matlab script are files in Berkeley logic interchange format (BLIF) of each benchmark [50]; BLIF consists of the minterms of each 4-input LUT which can be directly mapped to crossbar using our methodology. [49,[51][52][53], and provide realistic values for memristor as well as nanowires used to build the crossbar. For CMOS controller and voltage drivers, the UMC 90nm library is used.…”

Section: A Simulation Setup and Performance Metricsmentioning

confidence: 99%

A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar

Xie

Nguyen

Taouil

et al. 2018

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Alternatives to CMOS logic circuit implementations are under research for future scaled electronics. Memristor crossbar based logic circuit is one of the promising candidates to at least partially replace CMOS technology, which is facing many challenges such as reduced scalability, reliability, and performance gain. Memristor crossbar offers many advantages including scalability, high integration density, non-volatility, etc. The state-of-the-art for memristor crossbar logic circuit design can only implement simple and small circuits. This paper proposes a mapping methodology of large Boolean logic circuits on memristor crossbar. Appropriate place-and-route schemes, to efficiently map the circuits on the crossbar, as well as several optimization schemes are also proposed. To illustrate the potential of the methodology, a multi-bit adder and other nine more complex benchmarks are studied; the delay, area and power consumption induced by both the crossbar and its CMOS control part are evaluated.

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Performance and energy models for memristor-based 1T1R RRAM cell

Cited by 19 publications

References 10 publications

A fully hardware-based memristive multilayer neural network

A fully hardware-based memristive multilayer neural network

Overview of emerging nonvolatile memory technologies

A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar

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