Performance characterisation of a microwave transistor for the maximum output power and the required noise

Abstract

The performance characterisation of a microwave transistor is carried out rigorously based on the linear circuit and noise theories, subject to the maximum output power and the predetermined input termination. For this purpose, the transducer gain G T is maximised analytically with respect to the input termination Z S for the output port matched, provided that Z S meets the noise figure requirement F req ≥ F min remaining within the unconditionally stable working area (USWA). Analysis is made in the z-parameter domain which facilitates a single unique crescent conditional stability configuration to replace the eight different, rather complicated stability configurations in the S-parameter domain. Finally, the compromise relations between the gain, noise figure for the output port matched are obtained with typical design configurations depending on the operation conditions of a selected high technology transistor. Incompatible noise and gain requirements can also be observed in their design configurations. Furthermore the cross-relations among the bias condition (V DS , I DS) and ingredients of the performance {F req ≥ F min , V out =1, G T ≤ G Tmax } triplets and together with their terminations {Z S , Z L = Z* out (Z S)} can be formed basis for "Performance Data Sheets" of microwave transistors to be employed for the amplifier designs of maximum output power and low noise.

Performance characterization of a microwave transistor subject to the noise and matching requirements

“…Although the cascade configuration is commonly used in the utilization of the high-performance LNA designs, because it requires bigger than 1 V supply voltage, it is unsuitable to be used in the miniature LNA with the low-voltage applications. The first stage of this challenging problem is to in Figure 2 that can be considered to consist of the following three main stages in Z in -plane for the predetermined input termination Z S ensuring the maximum power delivery for the given noise F req [18,20,21]: (1) In the first stage, the input V in ≥ 1 and output V out ≥ 1 mismatch circles for the predetermined Z S are constructed; (2) in the second stage, all the constant gain circles G Tmin ≤ G T ≤ G Tmax are formed within the unconditionally stable working area (USWA) for either conditional or unconditional stability cases, separately; Figure 2. Recently, ultra-low power (≤2 mW dc power) LNA designs [1][2][3][4][5] have been reported; however, they usually suffer high-noise figure (F ≥ 3.5 dB) and operate at lower frequencies (≤5.5 GHz).…”

“…Firstly, because the input termination Z S determines the noise F ≥ F min , thus the input termination Z S is pre-determined to lie on the tangent constant noise and available gain circles so that the maximum power delivery is ensured for the given noise. In the recent work [20], performance characterization of a microwave transistor has been completed for the maximum output power, and the required noise that result in the compatible {F req ≥ F min , V out = 1, G Tmax } triplets and together with their terminations {Z S , Z L = Z * out (Z S )} to be employed for the amplifier designs of the maximum output power and the required low noise.In a recent work, LNA design using constant input and output mismatch circles are investigated in the existence of an embedded degenerative series feedback in the S-parameter domain and optimum trade-off between input and output mismatchings is established [21].To the best knowledge of the authors, the first time in the literature, in this work, the nonlinear performance equations of a microwave transistor are solved based on the geometrical approach [18][19][20] for the gain G T ( f ) with respect to the {Z S , Z L } terminations to meet the given noise F ≥ F min and mismatchings at the ports (V in ≥ 1, V out ≥ 1) subject to the physical realizability conditions. Finally, the compatible (F ≥ F min , G T , V in ≥ 1, V out ≥ 1) quadrates for either required or optimum (V in ≥ 1, V out ≥ 1) couples are obtained with their (Z S , Z L ) couples from the analysis of the design configuration.…”

“…Then, a design configuration is constructed in the input impedance Z in -plane covering the gain and the required input and output mismatch circles within the Unconditionally Stable Working Area for the predetermined input termination Z S . Then the resulted compatible (F ≥ F min , G T , V in ≥ 1, V out ≥ 1) quadrates for either required or optimum (V in ≥ 1, V out ≥ 1) couples are used in obtaining the trade-off relations between gain G T ( f ), noise F( f ), and mismatch losses at the input V in ( f ) ≥ 1 and output V out ( f ) ≥ 1.Because the z-parameter domain facilitates to combine the six different conditional stability configurations in the S-parameter domain into a single configuration within the either port impedance plane [18,20] for our case, it will be convenient to build the design configuration in the input impedance Z in -plane using the [z]-parameters (Figure 1). Furthermore, a case study is also presented for the full flexible performance characterization of a selected microwave transistor.…”

“…To the best knowledge of the authors, the first time in the literature, in this work, the nonlinear performance equations of a microwave transistor are solved based on the geometrical approach [18][19][20] for the gain G T ( f ) with respect to the {Z S , Z L } terminations to meet the given noise F ≥ F min and mismatchings at the ports (V in ≥ 1, V out ≥ 1) subject to the physical realizability conditions. Then the resulted compatible (F ≥ F min , G T , V in ≥ 1, V out ≥ 1) quadrates for either required or optimum (V in ≥ 1, V out ≥ 1) couples are used in obtaining the trade-off relations between gain G T ( f ), noise F( f ), and mismatch losses at the input V in ( f ) ≥ 1 and output V out ( f ) ≥ 1.…”

“…Because the z-parameter domain facilitates to combine the six different conditional stability configurations in the S-parameter domain into a single configuration within the either port impedance plane [18,20] for our case, it will be convenient to build the design configuration in the input impedance Z in -plane using the [z]-parameters (Figure 1). The work is given as a flow diagram Figure 1.…”