Performance-driven parallel reconfigurable computing architecture for multi-standard video decoding

Kao, Chia Chuen

doi:10.1007/s11042-020-09505-1

Cited by 2 publications

(1 citation statement)

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“…This section discusses most of the existing motion estimation techniques shortly. Kao et al (2020) introduced video processing utilisation that mostly required maximal capacity of computing but had performance with constraints of power, specifically in portable devices. General purpose processors no longer satisfying these needs.…”

Section: Literature Review and Related Workmentioning

confidence: 99%

An efficient field-programmable gate array-based hardware oriented block motion estimation algorithm based on diamond adaptive rood pattern search algorithm for multi-standard video codec

Balamurugan

Seshasayanan

2021

Transactions of the Institute of Measurement and Control

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Motion estimation and motion compensation techniques are effectively used for removing temporal redundancy between adjacent frames during video compression, but video quality will be degraded with the traditional pixel-based matching algorithms. To overcome this issue, diamond adaptive rood pattern search algorithm-based block-matching motion estimation algorithms are proposed in this manuscript for multi-stranded codec hardware design, which provide a high compression rate with less computational complexity. In this work, a diamond adaptive rood pattern search algorithm is used, which is a combination of a diamond-search algorithm and adaptive rood pattern search. In addition, the proposed algorithm applies multiple search strategies and terminates unnecessary searching while reserving high data regularity. The proposed diamond adaptive rood pattern search algorithm-based block-matching motion estimation algorithm for multi-stranded codec hardware design provides good performance in terms of complex calculations reduction and reaches a high speed in comparison to traditional search algorithms. The proposed architecture is implemented in Xilinx ISE design 14.5 suite and the implemented results are compared to the existing motion estimation techniques on field-programmable gate array devices. Simulation results shows that the diamond adaptive rood pattern search algorithm for multi-stranded codec hardware design provides a very good improvement in terms of computations overhead reduction, with 96.4%, 97.3% latency and 98.7% throughput and achieves a high compression rate without video quality degradation.

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Section: Literature Review and Related Workmentioning

confidence: 99%