Performance evaluation of fuzzy operators for FPGA technology

Iregui, S.; Linares, D.; Melgarejo, Miguel

doi:10.1109/nafips.2008.4531245

Cited by 7 publications

(1 citation statement)

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“…At the same time, Knowledge database not only provides control rules for fuzzy reasoning module which performs reasoning process and infers fuzzy quantity output from fuzzy quantity input, but also provides subordination of the fuzzy quantity for defuzzification module. Defuzzification will convert fuzzy quantity and subordination into corresponding precise amount [5]. The fuzzy controller is designed using the top-down method, which is divided to several modules that have right and clear relation and can be easily to implement.…”

Section: The Fpga Implement Of Fuzzy Controllermentioning

confidence: 99%

Single Chip Fuzzy Control System Based on Mixed-Signal FPGA

Liu

Min

2009

2009 International Conference on Intelligent Human-Machine Systems and Cybernetics

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A fuzzy control system is analyzed and designed basing on a new hardware platform mixed-signal FPGA. Besides fuzzy control module, FPGA is also embedded with 8051, PWM, ADC. After analyzing the principle of fuzzy control module, it's divided into several modules according to the functional needs on the basis of this division the logic structure of all modules can be obtained. Then based on topdown design method, the fuzzy control module is designed with Verilog HDL, and the whole design is optimized and simulated successfully. Finally, the implementation of the fuzzy control system on a specific FPGA is given.

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Section: The Fpga Implement Of Fuzzy Controllermentioning

confidence: 99%

Single Chip Fuzzy Control System Based on Mixed-Signal FPGA

Liu

Min

2009

2009 International Conference on Intelligent Human-Machine Systems and Cybernetics

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Design and Simulation of the Type-2 Fuzzification Stage: Using Active Membership Functions

Montiel

Sepúlveda

Maldonado³

et al. 2009

Evolutionary Design of Intelligent Systems in Modeling, Simulation and Control

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Abstract. This paper describes the design and implementation of the fuzzification stage for type-1 and type-2 fuzzy inference systems (FIS). A versatile method to calculate the membership values was used, it handles real numbers using decimal floating point binary encoding to calculate the slopes of triangular and trapezoidal membership functions. The designs were developed using VHDL code for FPGA implementation. The type-1 implementation is shown to give the basis of the type-2 implementation, which is based on the average method that consists in substituting an interval type-2 FIS by two type-1 FISs to cope with uncertainty. The functionality of the designs were evaluated by the analysis of the control surface plots of a speed controller for a DC motor. The plots were obtained from Simulink models that includes the VHDL designs developed in the Xilinx ISE. They were imported to the Simulink environment through the Xilinx System Generator.

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