Performance Evaluation of Incremental Sigma-Delta ADCs Based on their NTF

Wagner, Johannes; Vogelmann, Patrick; Ortmanns, Maurits

doi:10.1109/tcsii.2020.2981865

Cited by 5 publications

(8 citation statements)

References 11 publications

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“…The NTFs are also depicted in Figure 5; most importantly, predictions by the introduced analytical approach for transfer functions of reconfigurable I-DS ADC and simulations match excellently for the NTF again. The commonly known noise-shaping of free-running DSM is no longer seen in incremental operation, as was shown in [6]; despite, the NTF shows a rather flat course as a result of the used matched reconstruction filters. This leads to an overall spectral suppression of the quantization error, before all higher Nyquist bands are folded into the in-band in the decimating reconstruction filter.…”

Section: Comparison Of Analysis To Simulationmentioning

confidence: 87%

“…This leads to an overall spectral suppression of the quantization error, before all higher Nyquist bands are folded into the in-band in the decimating reconstruction filter. It can be noted that the transfer functions of the nonreconfigured I-DS ADCs T F L (z) and T F E (z) can also be calculated using the LTI approach of [6]. But, it can be seen in Figure 5 that none of them is even close to the reconfigured linear-exponential transfer functions T F LE (z) and, therefore, it wouldn't be possible to predict any performances correctly without the LTV approach introduced in this paper.…”

Section: Comparison Of Analysis To Simulationmentioning

confidence: 99%

“…In order to account for this, in most prior art [1], [3], [4] it was exclusively analysed in the time domain. A frequency-domain description has been elaborated for I-DS ADCs in [5] and [6], which regards the incremental Delta-Sigma modulator (I-DSM) as a finite impulse response filter, and allows to derive an overall STF and NTF. Thereby, the effect of discarding an input sample and hold (S/H) on the signal filtering property was implicitly described.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase

Kaesser,

Ismail,

Wagner

et al. 2023

IEEE Trans. Circuits Syst. I

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In this paper, analysis of linear time-variant systems is applied to incremental Delta-Sigma (I-DS) ADCs with periodic architectural reconfiguration in the frequency domain. The analysis will then be applied to the example of linear-exponential I-DS ADCs as a state-of-the-art dynamic reconfiguration technique. It is shown how a matched reconstruction filter of the reconfigured linear-exponential incremental Delta-Sigma modulator (I-DSM) can be mathematically derived. Using the calculated overall transfer functions of the linear-exponential I-DS ADC, accurate performance predictions can be given. The proposed method allows the accurate prediction of performances and gives insight and understanding of the performance improvements and trade-offs achieved by reconfiguration techniques in I-DS ADCs in general and the exponential phase in particular.

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Section: Comparison Of Analysis To Simulationmentioning

confidence: 87%

Section: Comparison Of Analysis To Simulationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase

Kaesser,

Ismail,

Wagner

et al. 2023

IEEE Trans. Circuits Syst. I

Self Cite

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“…As a result, compared to an ideal filter, they suffer from signal-toquantization-noise ratio (SQNR) losses ranging from a few to a few tens of decibels after reconstruction [12]. A recently modified CoI filter [21] performs slightly better by incorporating a lossy digital integrator stage. However, its on-chip implementation is costly due to the requirement of fixed-point multiplication operations.…”

Section: A Prior Art Of Idc Reconstruction Filtermentioning

confidence: 99%

L${}_{\text{2}}$min${}^{\text{2/2s}}$: Efficient Linear Reconstruction Filter for Incremental Delta-Sigma ADCs

Wang,

Law,

Schneider

2023

IEEE Trans. Signal Process.

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While it becomes more challenging to improve the energy efficiency of incremental delta-sigma data converters (IDCs) from the analog circuit design perspective, we propose two novel linear reconstruction filters for IDCs to enhance their performance in a digital way, including the L2min 2 filter and its symmetric version, the L2min 2s filter. Compared to the classical linear reconstruction filters, such as the cascade-ofintegrators (CoI) and cascaded integrator-comb (CIC) filter (an implementation of sinc filter), the proposed filters can achieve efficient quantization and thermal noise suppression, with the lowest thermal noise penalty factor of 1.2 among the high-order linear reconstruction filters. In this paper, we present analytical, numerical, and experimental results to demonstrate the superior performance of the filters for first-order and second-order IDC output reconstruction. The proposed filters are hardwarefriendly and example digital implementations in a standard complementary metal-oxide-semiconductor (CMOS) and fieldprogrammable gate array (FPGA) platforms are included in this paper.

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“…With the continuous development of electronic science and technology since humankind entered the electronic information age, whether, in the defense or civilian context, the demand for electronic products is getting higher and higher, especially in the portable consumer electronics market, which is rising in the general situation. The renewal of electronic products and the rapid development of mixed-signal systems are increasingly demanding [16][17][18]. The sensor can be regarded as a device that forms the interface between non-electrical physical domains and the electrical domain.…”

Section: Introductionmentioning

confidence: 99%

Study of a High-Precision Read-Out Integrated Circuit for Bridge Sensors

Li,

Wang,

et al. 2023

Micromachines

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Bridge sensors are widely used in military and civilian fields, and their demand gradually increases each year. Digital sensors are widely used in the military and civilian fields. High-precision and low-power analog-to-digital converters (ADCs) as sensor read-out circuits are a research hotspot. Sigma-delta ADC circuits based on switched-capacitor topology have the advantages of high signal-to-noise ratio (SNR), good linearity, and better compatibility with CMOS processes. In this work, a fourth-order feed-forward sigma-delta modulator and a digital decimation filter are designed and implemented with a correlated double sampling technique (CDS) to suppress pre-integrator low-frequency noise. This work used an active pre-compensator circuit for deep phase compensation to improve the system’s stability in the sigma-delta modulator. The modulator’s local feedback factor is designed to be adjustable off-chip to eliminate the effect of process errors. A three-stage cascade structure was chosen for the post-stage digital filter, significantly reducing the number of operations and the required memory cells in the digital circuit. Finally, the layout design and engineering circuit were fabricated by a standard 0.35 μm CMOS process from Shanghai Hua Hong with a chip area of 9 mm2. At a 5 V voltage supply and sampling frequency of 6.144 MHz, the modulator power consumption is 13 mW, the maximum input signal amplitude is −3 dBFs, the 1 Hz dynamic range is about 118 dB, the modulator signal-to-noise ratio can reach 110.5 dB when the signal bandwidth is 24 kHz, the practical bit is about 18.05 bits, and the harmonic distortion is about −113 dB, which meets the design requirements. The output bit stream is 24 bits.

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Performance Evaluation of Incremental Sigma-Delta ADCs Based on their NTF

Cited by 5 publications

References 11 publications

Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase

Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase

L${}_{\text{2}}$min${}^{\text{2/2s}}$: Efficient Linear Reconstruction Filter for Incremental Delta-Sigma ADCs

Study of a High-Precision Read-Out Integrated Circuit for Bridge Sensors

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