2021
DOI: 10.1109/tec.2021.3069019
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Performance Investigation on SVPWM Sequences Based on Reduced Common-Mode Voltage in Dual Three-Phase Asymmetrical Machine

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Cited by 18 publications
(1 citation statement)
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“…The calculation of time offset is shown in the flowchart in Fig. 34 The change in turn on time will result in change in output voltages [156], [157], [232]. The pole voltages are shown in Fig.…”
Section: Figure 32 Space-vector Diagram Of Three-level Inverters For Asymmetrical Dc-link Voltagesmentioning
confidence: 99%
“…The calculation of time offset is shown in the flowchart in Fig. 34 The change in turn on time will result in change in output voltages [156], [157], [232]. The pole voltages are shown in Fig.…”
Section: Figure 32 Space-vector Diagram Of Three-level Inverters For Asymmetrical Dc-link Voltagesmentioning
confidence: 99%