Performance Modeling of 2D Cellular Automata on FPGA

Murtaza, S.; Hoekstra, Alfons G.; Shot, P.M.A.

doi:10.1109/fpl.2007.4380628

Cited by 16 publications

(9 citation statements)

References 12 publications

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“…Again, influenced by the computational structure of our chosen test bench, that is, HPP and the FPGA resource utilization per PE for our I/O bound CA accelerator implementation Murtaza et al [2007], the CE with a single CB as shown in Figure 3 can now be extended along the horizontal space with n CBs as shown in Figure 7 depending on the available FPGA resources.…”

Section: I/o Bound 2d Ca On Fpgamentioning

confidence: 99%

Compute Bound and I/O Bound Cellular Automata Simulations on FPGA Logic

Murtaza

Hoekstra

Sloot

2009

ACM Trans. Reconfigurable Technol. Syst.

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FPGA-based computation engines have been used as Cellular Automata accelerators in the scientific community for some time now. With the recent availability of more advanced FPGA logic it becomes necessary to better understand the mapping of Cellular Automata to these systems. There are many trade-offs to consider when mapping a Cellular Automata algorithm from an abstract system to the physical implementation using FPGA logic. The trade-offs include both the available FPGA resources and the Cellular Automata algorithm's execution time. The most important aspect is to fully understand the behavior of the specified CA algorithm in terms of its execution times which are either compute bound or I/O bound. In this article, we present a methodology to categorize a specified CA algorithm as a compute bound or an I/O bound. We take the methodology further by presenting rigorous analysis for each of the two cases identifying the various parameters that control the mapping process and are defined both by the Cellular Automata algorithm and the given FPGA hardware specifications. This methodology helps to predict the performance of running Cellular Automata algorithms on specific FPGA hardware and to determine optimal values for the various parameters that control the mapping process. The model is validated for both compute and I/O bound two-dimensional Cellular Automata algorithms. We find that our model predictions are accurate within 7%.

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Section: I/o Bound 2d Ca On Fpgamentioning

confidence: 99%

Compute Bound and I/O Bound Cellular Automata Simulations on FPGA Logic

Murtaza

Hoekstra

Sloot

2009

ACM Trans. Reconfigurable Technol. Syst.

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“…in this case using a BGK collision operator [1]) where [11][12][13][14][15][16][17][18] are exchanged with the node's eight neighbours (propagation function) and fo represents the particle at rest internal to the node.…”

Section: Introductionmentioning

confidence: 99%

“…We too have been working and reporting our FPGA-based CA accelerator implementations results [16,17] but our aim is Cellular Automata (CA) are decentralized spatially extended not only in sheer speed-up but also to trace the methodology systems consisting of large numbers of simple and identical working behind the process of mapping a CA algorithm from components with local connectivity [1,2]. Such systems have an abstract concept to the physical implementation details of the potential to perform complex computations with a high FPGA logic.…”

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confidence: 99%

“…Performance modeling such as presented in [16,17] provide more insight into bridging the gap between the application and the hardware implementation. This approach not only does provide pros and cons for the selected implementation.…”

mentioning

confidence: 99%

“…With the application of CAs in such a wide diversity of fields it is not surprising that both the scientific community and industry have researched many possible implementation approaches, from massively parallel and distributed systems, to reconfigurable platforms such as FPGA-based systems [10][11][12][13][14][15][16].…”

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confidence: 99%

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Floating point based Cellular Automata simulations using a dual FPGA-enabled system

Murtaza

Hoekstra

Sloot

2008

2008 Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications

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With the recent emergence of multicore architectures, the age of multicore computing might have already dawned upon us. This shift might have triggered the evolution of von Neumann architecture towards a parallel processing paradigm. Cellular Automata-inherently decentralized spatially extended systems consisting of large numbers of simple and identical components with local connectivity, also proposed by von Neumann in 1950s, is the potential candidate among the parallel processing alternatives. The spatial parallelism available on field programmable gate arrays make them the ideal platform to investigate the cellular automata systems as potential parallel processing paradigm on multicore architectures. The authors have been experimenting with this idea for quite some time now and report their progress from a single to a dual FPGA chip based cellular automata accelerator implementation. For D2Q9 Lattice Boltzmann method implementation, we were able to achieve an overall speed-up of 2.3 by moving our Fortran implementation to our single FPGA-based implementations. Further, with our dual FPGA-based implementation, we achieved a speed-up close to 1.8 compared to our single FPGA-based implementation.

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Physarum in silicon: the Greek motorways study

Tsompanas

Adamatzky

2014

Nat Comput

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Performance Modeling of 2D Cellular Automata on FPGA

Cited by 16 publications

References 12 publications

Compute Bound and I/O Bound Cellular Automata Simulations on FPGA Logic

Compute Bound and I/O Bound Cellular Automata Simulations on FPGA Logic

Floating point based Cellular Automata simulations using a dual FPGA-enabled system

Physarum in silicon: the Greek motorways study

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