Performance of a Front End prototype ASIC for picosecond precision time measurements with LGAD sensors

Agapopoulou, C.; Blin, Sylvie; Blot, A.; García, L. Castillo; Chmeissani, M.; Lorenzo, Selma Conforti Di; Taille, C. De La; Dinaucourt, P.; Fallou, A.; Rodríguez, José García; Gkougkousis, Vagelis; Grieco, C.; Grinstein, S.; Guindon, S.; Makovec, N.; Martin-Chassard, Gisèle; Pellegrini, G.; Rummler, A.; Sacerdoti, S.; Moreau, N. Seguin; Serin, L.; Tricoli, A.

doi:10.1088/1748-0221/15/07/p07007

Cited by 20 publications

(24 citation statements)

References 7 publications

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“…As shown in Fig. 6, signals from strips B and C, close to the center of the device, have a FWHM of about 4 ns that is compatible to published results for standard (DC-)LGAD sensors readout via ALTIROC [16]. Single mips signals have an average amplitude of ∼8 mV, with a long Landau tail up to amplitudes higher than 50 mV.…”

Section: Signal Generated By a Beta Source (Single Mip)supporting

confidence: 86%

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Signal formation and sharing in AC-LGADs using the ALTIROC 0 front-end chip

D'Amen,

Chen,

De La Taille

et al. 2022

Preprint

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The development of detectors that provide high resolution in four dimensions has attracted wide-spread interest in the scientific community for applications in high-energy physics, nuclear physics, medical imaging, mass spectroscopy as well as quantum information. However, finding a technology capable of fulfilling such aspiration proved to be an arduous task. Among other silicon-based candidates, the Low-Gain Avalanche Diode (LGAD) has already shown excellent timing performances but proved to be unsuitable for fine pixelization. Therefore, the AC-coupled LGAD (AC-LGAD) approach was introduced to provide high resolution in both time and space, making it a promising candidate for future 4D detectors. However, appropriate readout electronics must be developed to match the sensor's fast-time and fine-pitch capabilities. This is currently a major technological challenge. In this paper, we test AC-LGAD prototypes read out by the fast-time ASIC ALTIROC 0, originally developed for the readout of DC-coupled LGADs for the ATLAS experiment at the HL-LHC. Signal generated by either betas from a 90 Sr source or a focused infra-red laser were analyzed. This paper details the first successful readout of an AC-LGAD sensor using a readout chip. This result will pave the way for the design and construction of a new generation of AC-LGAD-based 4D detectors.

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Section: Signal Generated By a Beta Source (Single Mip)supporting

confidence: 86%

“…4) [15]. The rising edge of this digital pulse provides a measurement of the particle ToA while its width that of the ToT of the analog signal at the pre-amplifier stage [16]. The discriminator threshold is set by an external 10-bit DAC, common to all channels.…”

Section: The Altiroc 0 Chipmentioning

confidence: 99%

Signal formation and sharing in AC-LGADs using the ALTIROC 0 front-end chip

D'Amen,

Chen,

De La Taille

et al. 2022

Preprint

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“…These sizes ensure less than 10% occupancy at high pile-up densities, limited inter-pad space and low detector capacitance, which is important for time resolution. For the readout, a custom ALTIROC low-noise ASIC [7], [8] is developed and bumped to the sensors to meet the requirements for timing resolution and resistance to radiation. The ASIC will also provide functionality to count the number of hits registered in the sensor and transmit it at 40 MHz to allow unbiased, bunch-by-bunch measurements of the luminosity and the implementation of a minimum-bias trigger.…”

Section: A Overview and Requirementsmentioning

confidence: 99%

A High Granularity Timing Detector for the ATLAS Detector Phase-II Upgrade

Imam

2022

IEEE Trans. Nucl. Sci.

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To boost the performance of the Large Hadron Collider and increase the potential of discoveries after 2027, the High Luminosity LHC project has been announced, with the aim of increasing the luminosity by a factor of 10 above the design value of the LHC. This will lead to an increase of the pileup interactions and will negatively impact the reconstruction of objects in the ATLAS detector, as well as its triggering performance. In particular at the forward region, where the inner detector has a lower momentum resolution and the electromagnetic calorimeter has a coarser granularity. Therefore, a high granularity timing detector has been proposed to mitigate the pile-up effect; complementing the inner tracker and providing a luminosity measurement, it will be located in front of the LAr end-cap calorimeter.The HGTD will cover the pseudo-rapidity region between 2.4 and 4.0, with two layers of double-sided silicon sensors that will provide a time resolution of 30 ps per track. Each readout cell has a cross-section of 1.3 mm x 1.3 mm ensuring a high granular detector with 3.7 million channels. To achieve the required high signal-to-noise ratio and provide sufficient gain, Low Gain Avalanche Detector technology was chosen.The general specifications and requirements of LGAD will be outlined, as well as the technical design and status of the project. The ongoing R&D effort to study the sensors, readout ASIC, and other components, supported by laboratory and test beam results will also be presented, in addition to some physics and performance results.

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“…The preamplifier's topology in ETROC is based on a timing-measurement-optimized TIA, which has been well studied and carried out [9][10][11][12]. The schematic of the preamplifier is shown in figure 2(a).…”

Section: Preamplifiermentioning

confidence: 99%

Characterization of the CMS Endcap Timing Layer readout chip prototype with charge injection

Sun¹,

Gong²,

Zhang³

et al. 2021

J. Inst.

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We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS technology, reads out a 16× 16 pixel matrix of the Low-Gain Avalanche Detector (LGAD). The jitter contribution from ETROC is required to be below 40 ps to achieve the 50 ps overall time resolution per hit. The analog readout circuits in ETROC consist of the preamplifier and the discriminator. The preamplifier handles the LGAD charge signal with the most probable value of around 15 fC. The discriminator generates the digital pulse, which provides the Time-Of-Arrival (TOA, leading edge) and Time-Over-Threshold (TOT, pulse width) information. The prototype of ETROC (ETROC0) that implements a single channel of analog readout circuits has been evaluated with charge injection. The jitter of the analog readout circuits, measured from the discriminator's leading edge, is better than 16 ps for a charge larger than 15 fC with the sensor capacitance. The time walk resulting from different pulse heights can be corrected using the TOT measurement. The time resolution distribution has a standard deviation of 29 ps after the time-walk correction from the charge injection. At room temperature, the preamplifier's power consumption is measured to be 0.74 mW and 1.53 mW per pixel in the low- and high-power mode, respectively. The measured power consumption of the discriminator is 0.84 mW per pixel. With the ASIC alone or the LGAD sensor, The characterization performances fulfill the ETL's challenging requirements.

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Performance of a Front End prototype ASIC for picosecond precision time measurements with LGAD sensors

Cited by 20 publications

References 7 publications

Signal formation and sharing in AC-LGADs using the ALTIROC 0 front-end chip

Signal formation and sharing in AC-LGADs using the ALTIROC 0 front-end chip

A High Granularity Timing Detector for the ATLAS Detector Phase-II Upgrade

Characterization of the CMS Endcap Timing Layer readout chip prototype with charge injection

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